• [ CXEP3474 ]

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1.产品概述       2.产品特点     hWJ嘉泰姆

3.应用范围       4.技术规格书下载（PDF文档）hWJ嘉泰姆

5.产品封装       6.电路原理图  hWJ嘉泰姆

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   产品概述 返回TOPhWJ嘉泰姆

The CXEP3474 is a linear regulator designed to meet the JEDEC SSTL (Series Stub Termination Logic) specifications in DDRI/II/III/IIIL/IV –SDRAM systems. It provides accurate and fast response with up to 1.8A source/sink ability in load transient to track reference voltage. The terminated voltage can be generated by two external resistors or programmed by forcing VREF pin at a desired voltage. Also the CXEP3474 operate in low power consumption as low as 0.7mA and it has a shutdown function by setting VREF lower than 0.15V then the VTT is turned off and discharged via an internal MOSFET. This function obtains low quiescent current as 50μA for STR mode.

   产品特点 返回TOPhWJ嘉泰姆

„ Support DDR I (1.25 VTT), DDR II (0.9 VTT), DDR III (0.75 VTT), DDR IIIL (0.675VTT) and DDR IV (0.6 VTT) RequirementshWJ嘉泰姆

„ VCNTL Supply Voltage: 3V to 5.5V hWJ嘉泰姆

„ Termination Supply Voltage : 1.2V to 3.6V hWJ嘉泰姆

„ Stable with Output Ceramic Capacitor hWJ嘉泰姆

„ Over Current Protection hWJ嘉泰姆

„ Thermal Shutdown Protection hWJ嘉泰姆

„ Shutdown Function for STR (S3) Mode hWJ嘉泰姆

„ Adjustable Output Voltage with Resistors hWJ嘉泰姆

„ Built-In Soft-Start hWJ嘉泰姆

„ Power MOS integrated hWJ嘉泰姆

„ SOP-8 (FD) and MSOP-8 (FD) Package hWJ嘉泰姆

„ RoHS ComplianthWJ嘉泰姆

   应用范围 返回TOPhWJ嘉泰姆

„ DDR I/II/III/IIIL/IV Memory Termination hWJ嘉泰姆

„ SSTL_3, SSTL_2, SSTL_18, SSTL_15 hWJ嘉泰姆

„ Notebook/Desktop/Server hWJ嘉泰姆

„ Telecom/Datacom, GSM Base Station, LCD-TV/PDP-TV, Copier/Printer, Set-Top BoxhWJ嘉泰姆

   技术规格书（产品PDF) 返回TOP hWJ嘉泰姆

     需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！hWJ嘉泰姆

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产品封装图 返回TOPhWJ嘉泰姆

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电路原理图 返回TOPhWJ嘉泰姆

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