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首页 > 产品中心 > 电源管理 > DC升压型转换器 > DC升压转换 >2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
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CXSU63137集成了一个高性能升压转换器、两个线性调节器控制器、一个高压开关和一个(CXSU63137)、三个(CXSU63137)或五个(CXSU63137)大电流运算放大器,用于TFT-LCD应用。主升压调节器是电流模式、固定频率的PWM开关调节器。1.2兆赫的开关频率允许使用低剖面感应器和陶瓷电容器,以最小化液晶面板设计的厚度

2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
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产品简介

目录FGW嘉泰姆

1.产品概述                       2.产品特点FGW嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 FGW嘉泰姆
5.产品封装图                     6.电路原理图                   FGW嘉泰姆
7.功能概述                        8.相关产品FGW嘉泰姆

一,产品概述(General Description)         FGW嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.FGW嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.FGW嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, withFGW嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slewFGW嘉泰姆
rate. All inputs and outputs are rail-to-rail.FGW嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).FGW嘉泰姆
二.产品特点(Features)FGW嘉泰姆


· 2.6V to 6.5V Input Supply Range FGW嘉泰姆

· Current-Mode Step-Up Regulator FGW嘉泰姆

 - Fast Transient Response FGW嘉泰姆

 - 1.2MHz Fixed Operating Frequency FGW嘉泰姆

· ±1.5% High-Accuracy Output Voltage FGW嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET FGW嘉泰姆

· High Efficiency FGW嘉泰姆

· Low Quiescent Current (0.6mA Typical) FGW嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF FGW嘉泰姆

· High-performance Operational Amplifiers FGW嘉泰姆

 - ±150mA Output Short-Circuit CurrentFGW嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth FGW嘉泰姆

 - Rail-to-Rail Inputs/Outputs FGW嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs FGW嘉泰姆

· Over-Temperature Protection FGW嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) FGW嘉泰姆

· Lead Free Available (RoHS Compliant)FGW嘉泰姆

三,应用范围 (Applications)FGW嘉泰姆


    TFT LCD Displays for MonitorsFGW嘉泰姆
   TFT LCD Displays for Notebook ComputersFGW嘉泰姆
   Automotive DisplaysFGW嘉泰姆
四.下载产品资料PDF文档 FGW嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持FGW嘉泰姆

 QQ截图20160419174301.jpgFGW嘉泰姆

五,产品封装图 (Package)FGW嘉泰姆


blob.pngFGW嘉泰姆
blob.pngPin Function DescriptionFGW嘉泰姆

PinFGW嘉泰姆

NameFGW嘉泰姆

Function DescriptionFGW嘉泰姆

CXSU63137FGW嘉泰姆

CXSU63137-1FGW嘉泰姆

CXSU63137-2FGW嘉泰姆

1FGW嘉泰姆

SRCFGW嘉泰姆

SRCFGW嘉泰姆

SRCFGW嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. BypassFGW嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.FGW嘉泰姆

2FGW嘉泰姆

REFFGW嘉泰姆

REFFGW嘉泰姆

REFFGW嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum ofFGW嘉泰姆
0.22μFcapacitor closed to the pins.FGW嘉泰姆

3FGW嘉泰姆

AGNDFGW嘉泰姆

AGNDFGW嘉泰姆

AGNDFGW嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect toFGW嘉泰姆
power ground (PGND) underneath the IC.FGW嘉泰姆

4FGW嘉泰姆

PGNDFGW嘉泰姆

PGNDFGW嘉泰姆

PGNDFGW嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-upFGW嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of outputFGW嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog groundFGW嘉泰姆
(AGND) underneath the IC.FGW嘉泰姆

5FGW嘉泰姆

OUT1FGW嘉泰姆

OUT1FGW嘉泰姆

OUT1FGW嘉泰姆

Output of Operational-Amplifier 1FGW嘉泰姆

6FGW嘉泰姆

NEG1FGW嘉泰姆

NEG1FGW嘉泰姆

NEG1FGW嘉泰姆

Inverting Input of Operational-Amplifier 1FGW嘉泰姆

7FGW嘉泰姆

POS1FGW嘉泰姆

POS1FGW嘉泰姆

POS1FGW嘉泰姆

Non-inverting Input of Operational-Amplifier 1FGW嘉泰姆

8FGW嘉泰姆

NCFGW嘉泰姆

OUT2FGW嘉泰姆

OUT2FGW嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalFGW嘉泰姆
connected of CXSU63137.FGW嘉泰姆

9FGW嘉泰姆

NCFGW嘉泰姆

NEG2FGW嘉泰姆

NEG2FGW嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalFGW嘉泰姆
connected of CXSU63137.FGW嘉泰姆

10FGW嘉泰姆

ICFGW嘉泰姆

POS2FGW嘉泰姆

POS2FGW嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. InternalFGW嘉泰姆
connected to GND of CXSU63137FGW嘉泰姆

11FGW嘉泰姆

BGNDFGW嘉泰姆

BGNDFGW嘉泰姆

BGNDFGW嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)FGW嘉泰姆
underneath the IC.FGW嘉泰姆

12FGW嘉泰姆

NCFGW嘉泰姆

NCFGW嘉泰姆

POS3FGW嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internalFGW嘉泰姆
connected of CXSU63137/CXSU63137.FGW嘉泰姆

13FGW嘉泰姆

NCFGW嘉泰姆

NCFGW嘉泰姆

OUT3FGW嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.FGW嘉泰姆

14FGW嘉泰姆

SUPFGW嘉泰姆

SUPFGW嘉泰姆

SUPFGW嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. BypassFGW嘉泰姆
SUP to BGND with a 0.1μF capacitor.FGW嘉泰姆

15FGW嘉泰姆

NCFGW嘉泰姆

POS3FGW嘉泰姆

POS4FGW嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-invertingFGW嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.FGW嘉泰姆

16FGW嘉泰姆

NCFGW嘉泰姆

NEG3FGW嘉泰姆

NEG4FGW嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input ofFGW嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.FGW嘉泰姆

17FGW嘉泰姆

NCFGW嘉泰姆

OUT3FGW嘉泰姆

OUT4FGW嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output ofFGW嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.FGW嘉泰姆

18FGW嘉泰姆

ICFGW嘉泰姆

ICFGW嘉泰姆

POS5FGW嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connectedFGW嘉泰姆
to GND of CXSU63137/CXSU63137.FGW嘉泰姆

19FGW嘉泰姆

NCFGW嘉泰姆

NCFGW嘉泰姆

NEG5FGW嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connectedFGW嘉泰姆
of CXSU63137/CXSU63137.FGW嘉泰姆

20FGW嘉泰姆

NCFGW嘉泰姆

NCFGW嘉泰姆

OUT5FGW嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.FGW嘉泰姆

21FGW嘉泰姆

LXFGW嘉泰姆

LXFGW嘉泰姆

LXFGW嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductorFGW嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.FGW嘉泰姆

22FGW嘉泰姆

INFGW嘉泰姆

INFGW嘉泰姆

INFGW嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can rangeFGW嘉泰姆
from 2.6V to 6.5V.FGW嘉泰姆

23FGW嘉泰姆

FBFGW嘉泰姆

FBFGW嘉泰姆

FBFGW嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider fromFGW嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider withinFGW嘉泰姆
5mm of FB.FGW嘉泰姆

24FGW嘉泰姆

COMPFGW嘉泰姆

COMPFGW嘉泰姆

COMPFGW嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCFGW嘉泰姆
from COMP to AGND.FGW嘉泰姆

PinFunction DescriptionFGW嘉泰姆

PinFGW嘉泰姆

NameFGW嘉泰姆

Function DescriptionFGW嘉泰姆

CXSU63137FGW嘉泰姆

CXSU63137-1FGW嘉泰姆

CXSU63137-2FGW嘉泰姆

24FGW嘉泰姆

COMPFGW嘉泰姆

COMPFGW嘉泰姆

COMPFGW嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCFGW嘉泰姆
from COMP to AGND.FGW嘉泰姆

25FGW嘉泰姆

FBPFGW嘉泰姆

FBPFGW嘉泰姆

FBPFGW嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of aFGW嘉泰姆
resistive voltage-divider between the regulator output and AGND to set theFGW嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-dividerFGW嘉泰姆
close to the pin.FGW嘉泰姆

26FGW嘉泰姆

DRVPFGW嘉泰姆

DRVPFGW嘉泰姆

DRVPFGW嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channelFGW嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.FGW嘉泰姆

27FGW嘉泰姆

FBNFGW嘉泰姆

FBNFGW嘉泰姆

FBNFGW嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of aFGW嘉泰姆
resistive voltage-divider between the regulator output and REF to set theFGW嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-dividerFGW嘉泰姆
close to the pin.FGW嘉泰姆

28FGW嘉泰姆

DRVNFGW嘉泰姆

DRVNFGW嘉泰姆

DRVNFGW嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channelFGW嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.FGW嘉泰姆

29FGW嘉泰姆

DELFGW嘉泰姆

DELFGW嘉泰姆

DELFGW嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND toFGW嘉泰姆
set the high-voltage switch startup delay.FGW嘉泰姆

30FGW嘉泰姆

CTLFGW嘉泰姆

CTLFGW嘉泰姆

CTLFGW嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switchFGW嘉泰姆
between COM and SRC is on and the high-voltage switch between COM andFGW嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRCFGW嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL isFGW嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less thanFGW嘉泰姆
1.25V.FGW嘉泰姆

31FGW嘉泰姆

DRNFGW嘉泰姆

DRNFGW嘉泰姆

DRNFGW嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channelFGW嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceedFGW嘉泰姆
VSRC.FGW嘉泰姆

32FGW嘉泰姆

COMFGW嘉泰姆

COMFGW嘉泰姆

COMFGW嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow theFGW嘉泰姆
voltage on COM to exceed VSRC.FGW嘉泰姆

六.电路原理图FGW嘉泰姆
七,功能概述FGW嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:FGW嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.FGW嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.FGW嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.FGW嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.FGW嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.FGW嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.FGW嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-upFGW嘉泰姆
八,相关产品FGW嘉泰姆

Switching Regulator > Boost ConverterFGW嘉泰姆

 Part_No FGW嘉泰姆

PackageFGW嘉泰姆

Archi-tecture FGW嘉泰姆

Input FGW嘉泰姆

Voltage    FGW嘉泰姆

Max Adj.FGW嘉泰姆

Output FGW嘉泰姆

Voltage FGW嘉泰姆

Switch Current Limit (max) FGW嘉泰姆

Fixed FGW嘉泰姆

Output FGW嘉泰姆

Voltage  FGW嘉泰姆

Switching FGW嘉泰姆

Frequency FGW嘉泰姆

Internal Power   Switch FGW嘉泰姆

Sync. Rectifier FGW嘉泰姆

 

minFGW嘉泰姆

maxFGW嘉泰姆

minFGW嘉泰姆

maxFGW嘉泰姆

(A)FGW嘉泰姆

(V)FGW嘉泰姆

(kHz)FGW嘉泰姆

 

CXSU63133FGW嘉泰姆

SOT89FGW嘉泰姆

VM FGW嘉泰姆

0.9FGW嘉泰姆

5.5FGW嘉泰姆

2.5FGW嘉泰姆

5.5FGW嘉泰姆

0.5FGW嘉泰姆

1.8|2.6|2.8|3FGW嘉泰姆

|3.3|3.8|4.5|5FGW嘉泰姆

-FGW嘉泰姆

NoFGW嘉泰姆

YesFGW嘉泰姆

CXSU63134FGW嘉泰姆

MSOP8|TSSOP8FGW嘉泰姆

|SOP8FGW嘉泰姆

VMFGW嘉泰姆

2.5FGW嘉泰姆

5.5FGW嘉泰姆

2.5FGW嘉泰姆

-FGW嘉泰姆

-FGW嘉泰姆

-FGW嘉泰姆

200 ~ 1000FGW嘉泰姆

NoFGW嘉泰姆

NoFGW嘉泰姆

CXSU63135FGW嘉泰姆

TSSOP8|SOP-8PFGW嘉泰姆

VMFGW嘉泰姆

1FGW嘉泰姆

5.5FGW嘉泰姆

2.5FGW嘉泰姆

5FGW嘉泰姆

1FGW嘉泰姆

2.5|3.3FGW嘉泰姆

300FGW嘉泰姆

YesFGW嘉泰姆

YesFGW嘉泰姆

CXSU63136FGW嘉泰姆

SOP8FGW嘉泰姆

CMFGW嘉泰姆

3FGW嘉泰姆

40FGW嘉泰姆

1.25FGW嘉泰姆

40FGW嘉泰姆

1.5FGW嘉泰姆

-FGW嘉泰姆

33 ~ 100FGW嘉泰姆

YesFGW嘉泰姆

NoFGW嘉泰姆

CXSU63137FGW嘉泰姆

TQFN5x5-32FGW嘉泰姆

CMFGW嘉泰姆

2.5FGW嘉泰姆

6.5FGW嘉泰姆

2.5FGW嘉泰姆

18FGW嘉泰姆

3FGW嘉泰姆

NoFGW嘉泰姆

1200FGW嘉泰姆

YesFGW嘉泰姆

NoFGW嘉泰姆

CXSU63138FGW嘉泰姆

TSOT23-5FGW嘉泰姆

TDFN2x2-6FGW嘉泰姆

CMFGW嘉泰姆

2.5FGW嘉泰姆

6FGW嘉泰姆

2.5FGW嘉泰姆

20FGW嘉泰姆

2FGW嘉泰姆

-FGW嘉泰姆

1500FGW嘉泰姆

YesFGW嘉泰姆

NoFGW嘉泰姆

CXSU63139FGW嘉泰姆

TQFN4x4-6FGW嘉泰姆

TDFN3x3-12FGW嘉泰姆

CMFGW嘉泰姆

1.8FGW嘉泰姆

5.5FGW嘉泰姆

2.7FGW嘉泰姆

5.5FGW嘉泰姆

5FGW嘉泰姆

-FGW嘉泰姆

1.2FGW嘉泰姆

YesFGW嘉泰姆

YesFGW嘉泰姆

CXSU63140FGW嘉泰姆

SOT23-5FGW嘉泰姆

CMFGW嘉泰姆

2.5FGW嘉泰姆

6FGW嘉泰姆

2.5FGW嘉泰姆

32FGW嘉泰姆

1FGW嘉泰姆

-FGW嘉泰姆

1000FGW嘉泰姆

YesFGW嘉泰姆

NoFGW嘉泰姆

CXSU63141FGW嘉泰姆

TSOT-23-6 FGW嘉泰姆

TDFN2x2-8FGW嘉泰姆

CMFGW嘉泰姆

1.2FGW嘉泰姆

5.5FGW嘉泰姆

1.8FGW嘉泰姆

5.5FGW嘉泰姆

1.2FGW嘉泰姆

-FGW嘉泰姆

1.2FGW嘉泰姆

YesFGW嘉泰姆

YesFGW嘉泰姆

 FGW嘉泰姆

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