产品信息查询
产品 新闻
首页 > 产品中心 > 电源管理 > DC升压型转换器 > DC升压转换 >2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
0

CXSU63137集成了一个高性能升压转换器、两个线性调节器控制器、一个高压开关和一个(CXSU63137)、三个(CXSU63137)或五个(CXSU63137)大电流运算放大器,用于TFT-LCD应用。主升压调节器是电流模式、固定频率的PWM开关调节器。1.2兆赫的开关频率允许使用低剖面感应器和陶瓷电容器,以最小化液晶面板设计的厚度

2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
产品手册
  • "

产品订购

产品订购

产品简介

目录3Fn嘉泰姆

1.产品概述                       2.产品特点3Fn嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 3Fn嘉泰姆
5.产品封装图                     6.电路原理图                   3Fn嘉泰姆
7.功能概述                        8.相关产品3Fn嘉泰姆

一,产品概述(General Description)         3Fn嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.3Fn嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.3Fn嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, with3Fn嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slew3Fn嘉泰姆
rate. All inputs and outputs are rail-to-rail.3Fn嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).3Fn嘉泰姆
二.产品特点(Features)3Fn嘉泰姆


· 2.6V to 6.5V Input Supply Range 3Fn嘉泰姆

· Current-Mode Step-Up Regulator 3Fn嘉泰姆

 - Fast Transient Response 3Fn嘉泰姆

 - 1.2MHz Fixed Operating Frequency 3Fn嘉泰姆

· ±1.5% High-Accuracy Output Voltage 3Fn嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET 3Fn嘉泰姆

· High Efficiency 3Fn嘉泰姆

· Low Quiescent Current (0.6mA Typical) 3Fn嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF 3Fn嘉泰姆

· High-performance Operational Amplifiers 3Fn嘉泰姆

 - ±150mA Output Short-Circuit Current3Fn嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth 3Fn嘉泰姆

 - Rail-to-Rail Inputs/Outputs 3Fn嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs 3Fn嘉泰姆

· Over-Temperature Protection 3Fn嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) 3Fn嘉泰姆

· Lead Free Available (RoHS Compliant)3Fn嘉泰姆

三,应用范围 (Applications)3Fn嘉泰姆


    TFT LCD Displays for Monitors3Fn嘉泰姆
   TFT LCD Displays for Notebook Computers3Fn嘉泰姆
   Automotive Displays3Fn嘉泰姆
四.下载产品资料PDF文档 3Fn嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持3Fn嘉泰姆

 QQ截图20160419174301.jpg3Fn嘉泰姆

五,产品封装图 (Package)3Fn嘉泰姆


blob.png3Fn嘉泰姆
blob.pngPin Function Description3Fn嘉泰姆

Pin3Fn嘉泰姆

Name3Fn嘉泰姆

Function Description3Fn嘉泰姆

CXSU631373Fn嘉泰姆

CXSU63137-13Fn嘉泰姆

CXSU63137-23Fn嘉泰姆

13Fn嘉泰姆

SRC3Fn嘉泰姆

SRC3Fn嘉泰姆

SRC3Fn嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. Bypass3Fn嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.3Fn嘉泰姆

23Fn嘉泰姆

REF3Fn嘉泰姆

REF3Fn嘉泰姆

REF3Fn嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum of3Fn嘉泰姆
0.22μFcapacitor closed to the pins.3Fn嘉泰姆

33Fn嘉泰姆

AGND3Fn嘉泰姆

AGND3Fn嘉泰姆

AGND3Fn嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect to3Fn嘉泰姆
power ground (PGND) underneath the IC.3Fn嘉泰姆

43Fn嘉泰姆

PGND3Fn嘉泰姆

PGND3Fn嘉泰姆

PGND3Fn嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-up3Fn嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of output3Fn嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog ground3Fn嘉泰姆
(AGND) underneath the IC.3Fn嘉泰姆

53Fn嘉泰姆

OUT13Fn嘉泰姆

OUT13Fn嘉泰姆

OUT13Fn嘉泰姆

Output of Operational-Amplifier 13Fn嘉泰姆

63Fn嘉泰姆

NEG13Fn嘉泰姆

NEG13Fn嘉泰姆

NEG13Fn嘉泰姆

Inverting Input of Operational-Amplifier 13Fn嘉泰姆

73Fn嘉泰姆

POS13Fn嘉泰姆

POS13Fn嘉泰姆

POS13Fn嘉泰姆

Non-inverting Input of Operational-Amplifier 13Fn嘉泰姆

83Fn嘉泰姆

NC3Fn嘉泰姆

OUT23Fn嘉泰姆

OUT23Fn嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internal3Fn嘉泰姆
connected of CXSU63137.3Fn嘉泰姆

93Fn嘉泰姆

NC3Fn嘉泰姆

NEG23Fn嘉泰姆

NEG23Fn嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internal3Fn嘉泰姆
connected of CXSU63137.3Fn嘉泰姆

103Fn嘉泰姆

IC3Fn嘉泰姆

POS23Fn嘉泰姆

POS23Fn嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. Internal3Fn嘉泰姆
connected to GND of CXSU631373Fn嘉泰姆

113Fn嘉泰姆

BGND3Fn嘉泰姆

BGND3Fn嘉泰姆

BGND3Fn嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)3Fn嘉泰姆
underneath the IC.3Fn嘉泰姆

123Fn嘉泰姆

NC3Fn嘉泰姆

NC3Fn嘉泰姆

POS33Fn嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internal3Fn嘉泰姆
connected of CXSU63137/CXSU63137.3Fn嘉泰姆

133Fn嘉泰姆

NC3Fn嘉泰姆

NC3Fn嘉泰姆

OUT33Fn嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.3Fn嘉泰姆

143Fn嘉泰姆

SUP3Fn嘉泰姆

SUP3Fn嘉泰姆

SUP3Fn嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. Bypass3Fn嘉泰姆
SUP to BGND with a 0.1μF capacitor.3Fn嘉泰姆

153Fn嘉泰姆

NC3Fn嘉泰姆

POS33Fn嘉泰姆

POS43Fn嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-inverting3Fn嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.3Fn嘉泰姆

163Fn嘉泰姆

NC3Fn嘉泰姆

NEG33Fn嘉泰姆

NEG43Fn嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input of3Fn嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.3Fn嘉泰姆

173Fn嘉泰姆

NC3Fn嘉泰姆

OUT33Fn嘉泰姆

OUT43Fn嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output of3Fn嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.3Fn嘉泰姆

183Fn嘉泰姆

IC3Fn嘉泰姆

IC3Fn嘉泰姆

POS53Fn嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connected3Fn嘉泰姆
to GND of CXSU63137/CXSU63137.3Fn嘉泰姆

193Fn嘉泰姆

NC3Fn嘉泰姆

NC3Fn嘉泰姆

NEG53Fn嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connected3Fn嘉泰姆
of CXSU63137/CXSU63137.3Fn嘉泰姆

203Fn嘉泰姆

NC3Fn嘉泰姆

NC3Fn嘉泰姆

OUT53Fn嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.3Fn嘉泰姆

213Fn嘉泰姆

LX3Fn嘉泰姆

LX3Fn嘉泰姆

LX3Fn嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductor3Fn嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.3Fn嘉泰姆

223Fn嘉泰姆

IN3Fn嘉泰姆

IN3Fn嘉泰姆

IN3Fn嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can range3Fn嘉泰姆
from 2.6V to 6.5V.3Fn嘉泰姆

233Fn嘉泰姆

FB3Fn嘉泰姆

FB3Fn嘉泰姆

FB3Fn嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider from3Fn嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider within3Fn嘉泰姆
5mm of FB.3Fn嘉泰姆

243Fn嘉泰姆

COMP3Fn嘉泰姆

COMP3Fn嘉泰姆

COMP3Fn嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RC3Fn嘉泰姆
from COMP to AGND.3Fn嘉泰姆

PinFunction Description3Fn嘉泰姆

Pin3Fn嘉泰姆

Name3Fn嘉泰姆

Function Description3Fn嘉泰姆

CXSU631373Fn嘉泰姆

CXSU63137-13Fn嘉泰姆

CXSU63137-23Fn嘉泰姆

243Fn嘉泰姆

COMP3Fn嘉泰姆

COMP3Fn嘉泰姆

COMP3Fn嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RC3Fn嘉泰姆
from COMP to AGND.3Fn嘉泰姆

253Fn嘉泰姆

FBP3Fn嘉泰姆

FBP3Fn嘉泰姆

FBP3Fn嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of a3Fn嘉泰姆
resistive voltage-divider between the regulator output and AGND to set the3Fn嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-divider3Fn嘉泰姆
close to the pin.3Fn嘉泰姆

263Fn嘉泰姆

DRVP3Fn嘉泰姆

DRVP3Fn嘉泰姆

DRVP3Fn嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channel3Fn嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.3Fn嘉泰姆

273Fn嘉泰姆

FBN3Fn嘉泰姆

FBN3Fn嘉泰姆

FBN3Fn嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of a3Fn嘉泰姆
resistive voltage-divider between the regulator output and REF to set the3Fn嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-divider3Fn嘉泰姆
close to the pin.3Fn嘉泰姆

283Fn嘉泰姆

DRVN3Fn嘉泰姆

DRVN3Fn嘉泰姆

DRVN3Fn嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channel3Fn嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.3Fn嘉泰姆

293Fn嘉泰姆

DEL3Fn嘉泰姆

DEL3Fn嘉泰姆

DEL3Fn嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND to3Fn嘉泰姆
set the high-voltage switch startup delay.3Fn嘉泰姆

303Fn嘉泰姆

CTL3Fn嘉泰姆

CTL3Fn嘉泰姆

CTL3Fn嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switch3Fn嘉泰姆
between COM and SRC is on and the high-voltage switch between COM and3Fn嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRC3Fn嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL is3Fn嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less than3Fn嘉泰姆
1.25V.3Fn嘉泰姆

313Fn嘉泰姆

DRN3Fn嘉泰姆

DRN3Fn嘉泰姆

DRN3Fn嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channel3Fn嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceed3Fn嘉泰姆
VSRC.3Fn嘉泰姆

323Fn嘉泰姆

COM3Fn嘉泰姆

COM3Fn嘉泰姆

COM3Fn嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow the3Fn嘉泰姆
voltage on COM to exceed VSRC.3Fn嘉泰姆

六.电路原理图3Fn嘉泰姆
七,功能概述3Fn嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:3Fn嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.3Fn嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.3Fn嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.3Fn嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.3Fn嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.3Fn嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.3Fn嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-up3Fn嘉泰姆
八,相关产品3Fn嘉泰姆

Switching Regulator > Boost Converter3Fn嘉泰姆

 Part_No 3Fn嘉泰姆

Package3Fn嘉泰姆

Archi-tecture 3Fn嘉泰姆

Input 3Fn嘉泰姆

Voltage    3Fn嘉泰姆

Max Adj.3Fn嘉泰姆

Output 3Fn嘉泰姆

Voltage 3Fn嘉泰姆

Switch Current Limit (max) 3Fn嘉泰姆

Fixed 3Fn嘉泰姆

Output 3Fn嘉泰姆

Voltage  3Fn嘉泰姆

Switching 3Fn嘉泰姆

Frequency 3Fn嘉泰姆

Internal Power   Switch 3Fn嘉泰姆

Sync. Rectifier 3Fn嘉泰姆

 

min3Fn嘉泰姆

max3Fn嘉泰姆

min3Fn嘉泰姆

max3Fn嘉泰姆

(A)3Fn嘉泰姆

(V)3Fn嘉泰姆

(kHz)3Fn嘉泰姆

 

CXSU631333Fn嘉泰姆

SOT893Fn嘉泰姆

VM 3Fn嘉泰姆

0.93Fn嘉泰姆

5.53Fn嘉泰姆

2.53Fn嘉泰姆

5.53Fn嘉泰姆

0.53Fn嘉泰姆

1.8|2.6|2.8|33Fn嘉泰姆

|3.3|3.8|4.5|53Fn嘉泰姆

-3Fn嘉泰姆

No3Fn嘉泰姆

Yes3Fn嘉泰姆

CXSU631343Fn嘉泰姆

MSOP8|TSSOP83Fn嘉泰姆

|SOP83Fn嘉泰姆

VM3Fn嘉泰姆

2.53Fn嘉泰姆

5.53Fn嘉泰姆

2.53Fn嘉泰姆

-3Fn嘉泰姆

-3Fn嘉泰姆

-3Fn嘉泰姆

200 ~ 10003Fn嘉泰姆

No3Fn嘉泰姆

No3Fn嘉泰姆

CXSU631353Fn嘉泰姆

TSSOP8|SOP-8P3Fn嘉泰姆

VM3Fn嘉泰姆

13Fn嘉泰姆

5.53Fn嘉泰姆

2.53Fn嘉泰姆

53Fn嘉泰姆

13Fn嘉泰姆

2.5|3.33Fn嘉泰姆

3003Fn嘉泰姆

Yes3Fn嘉泰姆

Yes3Fn嘉泰姆

CXSU631363Fn嘉泰姆

SOP83Fn嘉泰姆

CM3Fn嘉泰姆

33Fn嘉泰姆

403Fn嘉泰姆

1.253Fn嘉泰姆

403Fn嘉泰姆

1.53Fn嘉泰姆

-3Fn嘉泰姆

33 ~ 1003Fn嘉泰姆

Yes3Fn嘉泰姆

No3Fn嘉泰姆

CXSU631373Fn嘉泰姆

TQFN5x5-323Fn嘉泰姆

CM3Fn嘉泰姆

2.53Fn嘉泰姆

6.53Fn嘉泰姆

2.53Fn嘉泰姆

183Fn嘉泰姆

33Fn嘉泰姆

No3Fn嘉泰姆

12003Fn嘉泰姆

Yes3Fn嘉泰姆

No3Fn嘉泰姆

CXSU631383Fn嘉泰姆

TSOT23-53Fn嘉泰姆

TDFN2x2-63Fn嘉泰姆

CM3Fn嘉泰姆

2.53Fn嘉泰姆

63Fn嘉泰姆

2.53Fn嘉泰姆

203Fn嘉泰姆

23Fn嘉泰姆

-3Fn嘉泰姆

15003Fn嘉泰姆

Yes3Fn嘉泰姆

No3Fn嘉泰姆

CXSU631393Fn嘉泰姆

TQFN4x4-63Fn嘉泰姆

TDFN3x3-123Fn嘉泰姆

CM3Fn嘉泰姆

1.83Fn嘉泰姆

5.53Fn嘉泰姆

2.73Fn嘉泰姆

5.53Fn嘉泰姆

53Fn嘉泰姆

-3Fn嘉泰姆

1.23Fn嘉泰姆

Yes3Fn嘉泰姆

Yes3Fn嘉泰姆

CXSU631403Fn嘉泰姆

SOT23-53Fn嘉泰姆

CM3Fn嘉泰姆

2.53Fn嘉泰姆

63Fn嘉泰姆

2.53Fn嘉泰姆

323Fn嘉泰姆

13Fn嘉泰姆

-3Fn嘉泰姆

10003Fn嘉泰姆

Yes3Fn嘉泰姆

No3Fn嘉泰姆

CXSU631413Fn嘉泰姆

TSOT-23-6 3Fn嘉泰姆

TDFN2x2-83Fn嘉泰姆

CM3Fn嘉泰姆

1.23Fn嘉泰姆

5.53Fn嘉泰姆

1.83Fn嘉泰姆

5.53Fn嘉泰姆

1.23Fn嘉泰姆

-3Fn嘉泰姆

1.23Fn嘉泰姆

Yes3Fn嘉泰姆

Yes3Fn嘉泰姆

 3Fn嘉泰姆