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1.5MHz高效单片同步降压调节器CXSD62130电流模式方案100%占空比从2.7V到6.0V的输入
发表时间:2020-04-25浏览次数:320
1.5MHz高效单片同步降压调节器CXSD62130电流模式方案100%占空比从2.7V到6.0V的输入
 

目录Pcl嘉泰姆

1.产品概述                       2.产品特点Pcl嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 Pcl嘉泰姆
5.产品封装图                     6.电路原理图                   Pcl嘉泰姆
7.功能概述                        8.相关产品Pcl嘉泰姆

一,产品概述(General Description)   Pcl嘉泰姆


 CXSD62130 CXSD62130A is a 1.5MHz high efficiency monolithic synchronous buck regulator. Design with current mode scheme,the CXSD62130 CXSD62130A is stable Pcl嘉泰姆

with ceramic output capacitor. Input voltage from 2.7V to 6.0V makes the Pcl嘉泰姆

CXSD62130 CXSD62130A ideally suited for single Li-Ion battery powered Pcl嘉泰姆

applications. 100%duty cycle provides low dropout operation, extending Pcl嘉泰姆

battery life in portable electrical devices. Theinternally fixed 1.5MHz Pcl嘉泰姆

operating frequency allows the using of small surface mount inductors and capacitors. The synchronous switches included inside increase the efficiencyPcl嘉泰姆

and eliminate the need of an external Schottky diode.Pcl嘉泰姆
   The CXSD62130 CXSD62130A is available in TDFN2x2-6 packages.Pcl嘉泰姆
二.产品特点(Features)Pcl嘉泰姆


1A Output CurrentPcl嘉泰姆
Wide 2.7V~6.0V Input VoltagePcl嘉泰姆
Fixed 1.5MHz Switching FrequencyPcl嘉泰姆
Low Dropout Operating at 100% Duty CyclePcl嘉泰姆
25μA Quiescent CurrentPcl嘉泰姆
Synchronous RectifierPcl嘉泰姆
0.6V Reference VoltagePcl嘉泰姆
<0.5μA Input Current During ShutdownPcl嘉泰姆
Short-Circuit ProtectionPcl嘉泰姆
Over-Temperature ProtectionPcl嘉泰姆
Available in TDFN2x2-6 PackagesPcl嘉泰姆
Lead Free and Green Devices AvailablePcl嘉泰姆
(RoHS Compliant)Pcl嘉泰姆
三,应用范围 (Applications)Pcl嘉泰姆


HD STBPcl嘉泰姆
BT MousePcl嘉泰姆
PND InstrumentPcl嘉泰姆
Portable InstrumentPcl嘉泰姆
四.下载产品资料PDF文档 Pcl嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持Pcl嘉泰姆

 QQ截图20160419174301.jpgPcl嘉泰姆

五,产品封装图 (Package)Pcl嘉泰姆


blob.pngPcl嘉泰姆
六.电路原理图Pcl嘉泰姆


blob.pngPcl嘉泰姆
blob.pngPcl嘉泰姆

七,功能概述Pcl嘉泰姆


Main Control LoopPcl嘉泰姆
The CXSD62130 CXSD62130A is a constant frequency, synchronous rectifier and current-mode Pcl嘉泰姆

switching regulato r. In normal operation, the internal P-channel power MOSFET is turned on eachPcl嘉泰姆

 cycle. The peak inductor current at which ICMP turn off the P-FET is controlled by the voltage onPcl嘉泰姆

 the COMP node, which is the output of the error amplifier (EAMP). An external resistive divider Pcl嘉泰姆

connected between VOUT and ground allows the EAMP to receive an output feedback voltage Pcl嘉泰姆

VFB at FB pin. When the load current increases, it causes a slightly decrease in VFB relative toPcl嘉泰姆

the 0.6V reference, which in turn causes the COMP voltage to increase until the average Pcl嘉泰姆

inductor current matches the new load current.Pcl嘉泰姆
Enable/ShutdownPcl嘉泰姆
Driving RUN to the ground places the CXSD62130 CXSD62130A in shutdown mode. WhenPcl嘉泰姆

 in shutdown, the internal power MOSFETs turn off, all internal circuitry shuts down and thePcl嘉泰姆

 quiescent supply current reduces to 0.5μA maximum.Pcl嘉泰姆
Pulse Frequency Modulation Mode (PFM)Pcl嘉泰姆
The CXSD62130 CXSD62130A is a fixed frequency, peak current mode PWM step-down Pcl嘉泰姆

converter. At light loads, the CXSD62130 CXSD62130A will automatically enter in pulse Pcl嘉泰姆

frequency mode operation to reduce the dominant switching losses. In PFM operation, Pcl嘉泰姆

the inductor current may reach zero or reverse on each pulse. A zero current comparator Pcl嘉泰姆

turn off the N-FET, forcing DCM operation at light load. These controls get very low Pcl嘉泰姆

quiescent current, help to maintain high effi-ciency over the complete load range.Pcl嘉泰姆
Slope Compensation and Inductor Peak CurrentPcl嘉泰姆
The CXSD62130 CXSD62130A is a peak current mode PWM step downconverter. ToPcl嘉泰姆

 prevent sub-harmonic oscillations, theCXSD62130 CXSD62130A sense the peak current and Pcl嘉泰姆

add slope compensation to stable the converter. It is accomplished in-ternally by addingPcl嘉泰姆

a compensating ramp to the inductor current signal at duty cycles in excess of 40%.Pcl嘉泰姆

 Normally,this results in a reduction of maximum inductor peak current for duty cycles >Pcl嘉泰姆

 40%. However, the CXSD62130 CXSD62130A uses a special scheme that counteracts this Pcl嘉泰姆

compensating ramp, which allows the maximum inductor peak current to remain unaffectedPcl嘉泰姆

 throughout all duty cycles.Pcl嘉泰姆
Dropout OperationPcl嘉泰姆
As the input supply voltage decreases to a value ap-proaching the output voltage, the dutyPcl嘉泰姆

 cycle increases toward the maximum on time. Further, reduction of thesupply voltage forces Pcl嘉泰姆

the main switch to remain on for more than one cycle until it reaches 100% duty cycle. ThePcl嘉泰姆

 input voltage minus the voltage drop will determine the output voltage across the P-FETPcl嘉泰姆

 and the inductor.An important detail to remember is that on resistance of P-FET switch Pcl嘉泰姆

will increase at low input supply voltageTherefore, the user should calculate the power dissipa-Pcl嘉泰姆
tion when the CXSD62130 CXSD62130A is used at 100% duty cycle with low input voltage.Pcl嘉泰姆
Over-Temperature Protection (OTP)Pcl嘉泰姆
The over-temperature circuit limits the junction tempera-ture of the CXSD62130 CXSD62130A. Pcl嘉泰姆

When the junction temperature ex-ceeds 150oC, a thermal sensor turns off the both power Pcl嘉泰姆

MOSFETs, allowing the devices to cool. The thermal sen-sor allows the converters to start a Pcl嘉泰姆

soft-start process and regulate the output voltage again after the junction tem-perature coolsPcl嘉泰姆

 by 30oC. The OTP is designed with a 30oC hysteresis to lower the average JunctionPcl嘉泰姆

 Temperature (TJ) during continuous thermal overload conditions, in-creasing the lifetime Pcl嘉泰姆

of the device.Pcl嘉泰姆
八,相关产品                    更多同类产品.......Pcl嘉泰姆


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SOT23-5|TSOT23-5Pcl嘉泰姆

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2.7Pcl嘉泰姆

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CXSD62126Pcl嘉泰姆

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0.8Pcl嘉泰姆

70Pcl嘉泰姆

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CXSD62127Pcl嘉泰姆

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55Pcl嘉泰姆

45Pcl嘉泰姆

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CXSD62128BPcl嘉泰姆

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