一,产品概述(General Description) rc7嘉泰姆 The CXSD62116A/B/C is a voltage mode, fixed 300kHz-switching frequency,rc7嘉泰姆 and synchronous buck controller. The CXSD62116A/B/C allows wide input voltagerc7嘉泰姆 that is either a single 5~12V or two supply voltage(s) for various applications.rc7嘉泰姆 A power-on-reset (POR) circuit monitors the VCC supply voltage to preventrc7嘉泰姆 wrong logic controls. A built-in digital soft-start circuit prevents the outputrc7嘉泰姆 voltages from overshoot as well as limits the input current. An internalrc7嘉泰姆 0.6V temperature-compensated reference voltage with high accuracy isrc7嘉泰姆 designed to meet the requirement of low output voltage applications.rc7嘉泰姆 The CXSD62116A/B/C provides excellent output voltage regulations againstrc7嘉泰姆 load current variation.rc7嘉泰姆 The controller’s over-current protection monitors the output currentrc7嘉泰姆 by using the voltage drops across the RDS(ON)of low-side MOSFET,rc7嘉泰姆 eliminating the need for a current sensing resistor that features highrc7嘉泰姆 efficiency and low cost.rc7嘉泰姆 The CXSD62116A/B/C also integrates over-voltage protection (OVP) andrc7嘉泰姆 under-voltage protection circuit which moni-tors the FB voltage to preventrc7嘉泰姆 the PWM output from over and under voltage.rc7嘉泰姆 The CXSD62116A/B/C is available in a simple SOP-8P package.rc7嘉泰姆 二.产品特点(Features)rc7嘉泰姆 Wide Operation Supply Voltage from 5V to 12Vrc7嘉泰姆 Power-On-Reset Monitoring on VCCrc7嘉泰姆 Excellent Reference Voltage Regulationsrc7嘉泰姆 - 0.6V Internal Referencerc7嘉泰姆 - ±1% Over Temperature Rangerc7嘉泰姆 Integrated Soft-Startrc7嘉泰姆 Automatic PSM/PWM Modesrc7嘉泰姆 Voltage Mode PWM Operation with 90% (Max.) Duty Cyclerc7嘉泰姆 Under-Voltage Protectionrc7嘉泰姆 Adjustable Over-Current Protection Thresholdrc7嘉泰姆 - Sensing the RDS(ON) of Low-Side MOSFETrc7嘉泰姆 Over-Voltage Protectionrc7嘉泰姆 Under-Voltage Protectionrc7嘉泰姆 Simple SOP-8P Packagerc7嘉泰姆 Lead Free and Green Devices Availablerc7嘉泰姆 (RoHS Compliant)rc7嘉泰姆 三,应用范围 (Applications)rc7嘉泰姆 Graphic Cardsrc7嘉泰姆 DSL, Switch HUBrc7嘉泰姆 Wireless Lanrc7嘉泰姆 Notebook Computerrc7嘉泰姆 Mother Boardrc7嘉泰姆 LCD Monitor/TVrc7嘉泰姆
四.下载产品资料PDF文档 rc7嘉泰姆
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五,产品封装图 (Package)rc7嘉泰姆 rc7嘉泰姆 六.电路原理图rc7嘉泰姆
rc7嘉泰姆 七,功能概述rc7嘉泰姆 Layout Considerationrc7嘉泰姆 In any high switching frequency converter, a correct lay-out is important to ensure proper operation of therc7嘉泰姆 regulator. With power devices switching at 300kHz,the resulting current transient will cause voltage spike acrossrc7嘉泰姆 the interconnecting impedance and parasitic circuit elements. As an example, consider the turn-off transitionrc7嘉泰姆 of the PWM MOSFET. Before turn-off, the MOSFET is car rying the full load current. During turn-off, current stopsrc7嘉泰姆 flowing in the MOSFET and is free-wheeling by the lower MOSFET and parasitic diode. Any parasitic inductance ofrc7嘉泰姆 the circuit generates a large voltage spike during the switching interval. In general, using short and wide printedrc7嘉泰姆 circuit traces should minimize interconnecting imped-rc7嘉泰姆
Layout Consideration (Cont.)rc7嘉泰姆 ances and the magnitude of voltage spike. And signal and power grounds are to be kept separate till combinedrc7嘉泰姆
using ground plane construction or single point grounding. Figure 8. illustrates the layout, with bold linesrc7嘉泰姆 indicating high current paths; these traces must be short and wide. Components along the bold lines should berc7嘉泰姆
placed lose together. Below is a checklist for your layout:rc7嘉泰姆
- Keep the switching nodes (UGATE, LGATE, and PHASE) away from sensitive small signal nodes since theserc7嘉泰姆
nodes are fast moving signals. Therefore, keep traces to these nodes as short as possible.rc7嘉泰姆
- The traces from the gate drivers to the MOSFETs (UG and LG) should be short and wide.rc7嘉泰姆
- Place the source of the high-side MOSFET and the drain of the low-side MOSFET as close as possible. Minimiz-rc7嘉泰姆 ing the impedance with wide layout plane between the two pads reduces the voltage bounce of the node.rc7嘉泰姆 - Decoupling capacitor, compensation component, the resistor dividers, and boot capacitors should be closerc7嘉泰姆 their pins. (For example, place the decoupling ceramic capacitor near the drain of the high-side MOSFET asrc7嘉泰姆 close as possible. The bulk capacitors are also placed near the drain).rc7嘉泰姆 - The input capacitor should be near the drain of the up-per MOSFET; the output capacitor should be near therc7嘉泰姆 loads. The input capacitor GND should be close to the output capacitor GND and the lower MOSFET GND.rc7嘉泰姆 - The drain of the MOSFETs (VIN and PHASE nodes) should be a large plane for heat sinking.rc7嘉泰姆 - The ROCSET resistance should be placed near the IC as close as possible.Close to ICrc7嘉泰姆 Figure 8. Layout Guidelinesrc7嘉泰姆