目录Pqc嘉泰姆

1.产品概述                       2.产品特点Pqc嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 Pqc嘉泰姆
5.产品封装图                     6.电路原理图                   Pqc嘉泰姆
7.功能概述                        8.相关产品Pqc嘉泰姆

一,产品概述(General Description)    Pqc嘉泰姆

      The CXSD6293 is a single-phase, constant-on-time, and  synchronousPqc嘉泰姆
PWM controller, which drives N-channel MOSFETs. An internal 0.5V temperature-compensated reference voltage with high accuracy is designed to meet thePqc嘉泰姆
requirement of low output voltage applications. The CXSD6293 steps downPqc嘉泰姆
high voltage to generate low-volt-age chipset or RAM supplies in notebookPqc嘉泰姆
computers.The PWM controller operates fixed 300kHz pseudo-con-Pqc嘉泰姆
stant frequency PWM with an adaptive constant-on-time control. The devicePqc嘉泰姆
provides excellent transient response and accurate DC voltage output in eitherPqc嘉泰姆
PFM or PWM Mode. In Pulse Frequency Mode (PFM), the CXSD6293 pro-Pqc嘉泰姆
vides very high efficiency over light to heavy loads with loading-modulatedPqc嘉泰姆
switching frequencies. The device works in ultrasonic mode with PFM at noPqc嘉泰姆
load. The unique ultrasonic mode maintains the switching frequency abovePqc嘉泰姆
20kHz, which eliminates noise in audio applications.Pqc嘉泰姆
          The CXSD6293 is equipped with accurate over-current,outputPqc嘉泰姆
under-voltage, and output over-voltage protections.A Power-On-ResetPqc嘉泰姆
function monitors the voltage on VCC to prevent wrong operation duringPqc嘉泰姆
power-on. The CXSD6293 has a 1.5ms digital soft-start to ramp up thePqc嘉泰姆
output voltage to reduce the start-up current. A soft-stop function activelyPqc嘉泰姆
discharges the output capacitors with controlled reverse inductor current.Pqc嘉泰姆
The CXSD6293 is available in TDFN3x3-10 packagePqc嘉泰姆
二.产品特点(Features)Pqc嘉泰姆

1.)Operates from An Input Battery Voltage Range of +3V to +25VPqc嘉泰姆
      ±0.6% 0.5V Reference Over Line, Load Regulation, andPqc嘉泰姆
      Operating Temp. Pqc嘉泰姆
2.)Drive Dual Low Cost N-Channel MOSFETsPqc嘉泰姆
    Adaptive Shoot-Through Protection Pqc嘉泰姆
3.)Power-On-Reset Monitoring on VCC PinPqc嘉泰姆
4.)PFM Mode for Increasing Light Load EfficiencyPqc嘉泰姆
5.)Constant-On-Time Control SchemePqc嘉泰姆
     Switching Frequency Compensation for PWM OperationPqc嘉泰姆
6.)300kHz Constant Switching FrequencyPqc嘉泰姆
7.)Integrated MOSFET Drivers and Bootstrap DiodePqc嘉泰姆
8.)Internal Soft-Start and Soft-StopPqc嘉泰姆
9.)Power Good MonitoringPqc嘉泰姆
10.)70% Under-Voltage ProtectionPqc嘉泰姆
11.)125% Over-Voltage ProtectionPqc嘉泰姆
     Using Low-Side MOSFET’s RDS(ON)Pqc嘉泰姆
12.)Over-Temperature ProtectionPqc嘉泰姆
13.)TDFN-10 3mmx3mm PackagePqc嘉泰姆
14.)Lead Free and Green Devices Available (RoHS Compliant)Pqc嘉泰姆
三,应用范围 (Applications)Pqc嘉泰姆

NotebookPqc嘉泰姆
Low Cost PCPqc嘉泰姆
Wide Input DC/DC RegulatorsPqc嘉泰姆
四.下载产品资料PDF文档 Pqc嘉泰姆

需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！Pqc嘉泰姆

 Pqc嘉泰姆

五,产品封装图 (Package)Pqc嘉泰姆

Pqc嘉泰姆
Pqc嘉泰姆

六.电路原理图Pqc嘉泰姆

Pqc嘉泰姆
七,功能概述Pqc嘉泰姆

Constant-On-Time PWM Controller with Input Feed-For-wardPqc嘉泰姆
The constant-on-time control architecture is a pseudo-fixed frequency with input voltage feed-forward. This ar-Pqc嘉泰姆
chitecture relies on the output filter capacitor’s effective series resistance (ESR) to act as a current-sense resis-Pqc嘉泰姆
tor so the output ripple voltage provides the PWM ramp signal. In PFM operation, the high-side switch on-time isPqc嘉泰姆
controlled by the on-time generator is determined solely by a one-shot whose pulse width is inversely propor-Pqc嘉泰姆
tional to the input voltage and directly proportional to the output voltage. In PWM operation, the high-side switchPqc嘉泰姆
on-time is determined by a switching frequency control circuit in the on-time generator block.The switchingPqc嘉泰姆
frequency control circuit senses the switch-ing frequency of the high-side switch and keeps regulat-Pqc嘉泰姆
ing it at a constant frequency in PWM mode. The design improves the frequency variation and is more outstand-Pqc嘉泰姆
ing than a conventional constant-on-time controller, which has large switching frequency variation over inputPqc嘉泰姆

 voltage,output current, and temperature. Both in PFM and PWM,the on-time generator, which senses input Pqc嘉泰姆

voltage on PHASE pin, provides very fast on-time response to input line transients.Another one-shot sets a Pqc嘉泰姆

minimum off-time (typical:300ns). The on-time one-shot is triggered if the error com-parator is high, thePqc嘉泰姆

 low-side switch current is below the current-limit threshold, and the minimum off-time one-shot has Pqc嘉泰姆

timed out. Pqc嘉泰姆
Pulse-Frequency Modulation (PFM)Pqc嘉泰姆
In PFM mode, an automatic switchover to pulse-frequency modulation (PFM) takes place at light loads. ThisPqc嘉泰姆
switchover is affected by a comparator that truncates the low-side switch on-time at the inductor current zeroPqc嘉泰姆
crossing. This mechanism causes the threshold between PFM and PWM operation to coincide with the boundaryPqc嘉泰姆
between continuous and discontinuous inductor-current operation (also known as the critical conduction point).Pqc嘉泰姆
The on-time of PFM is given by:Pqc嘉泰姆
Ultrasonic ModePqc嘉泰姆
The ultrasonic mode activates an unique PFM mode with a minimum switching frequency of 20kHz. The minimumPqc嘉泰姆
frequency 20kHz of ultrasonic mode eliminates audio-frequency interference in light load condition. It will transitPqc嘉泰姆
to unique PFM mode when output loading makes the frequency bigger than ultrasonic frequency.Pqc嘉泰姆
In ultrasonic mode, the controller automatically transits to fixed-frequency PWM operation when the load reachesPqc嘉泰姆
the same critical conduction point (ILOAD(PFM to PWM)).When the controller detects that no switching has oc-Pqc嘉泰姆
curred within about 40μs (Typical), an ultrasonic pulse will be occurred. The ultrasonic controller turns on thePqc嘉泰姆
low-side MOSFET firstly to reduce the output voltage. After feedback voltage drops below the internal referencePqc嘉泰姆
voltage, the controller turns off the low-side MOSFET and triggers a constant-on-time. When the constant-on-Pqc嘉泰姆

time has expired, the controller turns on the low-side MOSFET again until the inductor current is below the Pqc嘉泰姆

zero-cross-ing threshold. The behavior is the same as PFM mode. Pqc嘉泰姆
Power-On-Reset (POR)Pqc嘉泰姆
A Power-On-Reset (POR) function is designed to prevent wrong logic controls when the VCC voltage is low. ThePqc嘉泰姆
POR function continually monitors the bias supply volt-age on the VCC pin if at least one of the enable pins is setPqc嘉泰姆
high. When the rising VCC voltage reaches the rising POR voltage threshold (4.2V, typical), the POR signal goesPqc嘉泰姆
high and the chip initiates soft-start operations. When this voltage drops lower than 4.0V (typical), the POR dis-Pqc嘉泰姆
ables the chip.Pqc嘉泰姆

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