目录JQo嘉泰姆

1.产品概述                       2.产品特点JQo嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 JQo嘉泰姆
5.产品封装图                     6.电路原理图                   JQo嘉泰姆
7.功能概述                        8.相关产品JQo嘉泰姆

一,产品概述(General Description)         JQo嘉泰姆

       The CXSD6292 is a single-phase, constant-on-time, and synchronousJQo嘉泰姆
PWM controller which drives N-channel MOSFETs. The CXSD6292 stepsJQo嘉泰姆
down high voltage of a battery to generate low-voltage chipset or RAM suppliesJQo嘉泰姆
in notebook computers.JQo嘉泰姆
        The CXSD6292 provides excellent transient response and accurate DCJQo嘉泰姆
voltage output in either PFM or PWM Mode.In Pulse Frequency ModulationJQo嘉泰姆
(PFM) Mode, the CXSD6292 provides very high efficiency over light loadJQo嘉泰姆
with loading-modulated switching frequencies. When the inductor currentJQo嘉泰姆
is continuous, the operation automatically enters PWM mode with relativelyJQo嘉泰姆
constant switching frequency.For QFN4x4-16A and TQFN3x3-16 packages,JQo嘉泰姆
the Forced-PWM Mode works nearly at constant frequency for low-noiseJQo嘉泰姆
requirements.JQo嘉泰姆
         The CXSD6292 is equipped with accurate over-current,output under-JQo嘉泰姆
voltage, and over-voltage protections per-fect for NB application. A Power-JQo嘉泰姆
On-Reset function moni-tors the voltage on VCC pin to prevent errorneousJQo嘉泰姆
opera-tion during power-on. The CXSD6292 has a digital soft-start and soft-stop.JQo嘉泰姆
The internal integrated soft-start ramps up the output voltage with controlled slewJQo嘉泰姆
rate to reduce the start-up current. The digital soft-stop function actively dischargesJQo嘉泰姆
the output capacitors with controlled reverse inductor current.JQo嘉泰姆
     The CXSD6292 is available in SSOP-16, QFN4x4-16A, and TQFN3x3-16 packagesJQo嘉泰姆
二.产品特点(Features)JQo嘉泰姆

1.)Adjustable Output Voltage from +0.6V to +3.3VJQo嘉泰姆
    - 0.6V Reference VoltageJQo嘉泰姆
    - ±1% Accuracy Over TemperatureJQo嘉泰姆
2.)Operates from an Input Battery Voltage Range of +3V to +25VJQo嘉泰姆
3.)Wide Output Load Range from 0A to 25AJQo嘉泰姆
4.)Power-On-Reset Monitoring on VCC PinJQo嘉泰姆
5.)Excellent Line and Load Transient ResponseJQo嘉泰姆
6.)PFM Mode for Increased Light Load EfficiencyJQo嘉泰姆
7.)Programmable PWM Frequency from 200kHz to 600kHzJQo嘉泰姆
8.)Integrated MOSFET Drivers and Bootstrap DiodeJQo嘉泰姆
9.)Internal Integrated Soft-Start and Soft-StopJQo嘉泰姆
10.)Selectable Forced PWM or Automatic PFM/PWMJQo嘉泰姆
11.)Mode (only for QFN4x4-16A and TQFN3x3-16 Packages)JQo嘉泰姆
      Power Good MonitoringJQo嘉泰姆
12.)Fault Identification by PGOOD Pull-Down ResistanceJQo嘉泰姆
13.)70% Under-Voltage Protection (UVP)JQo嘉泰姆
14.)124% Over-Voltage Protection (OVP)JQo嘉泰姆
15.)Adjustable Over-Current Protection (OCP)JQo嘉泰姆
      - Sensing Low-Side MOSFET’s CurrentJQo嘉泰姆
16.)Over-Temperature Protection (OTP)JQo嘉泰姆
17.)SSOP-16, Compact 4mmx4mm QFN-16 (QFN4x4-JQo嘉泰姆
     16A), and TQFN3x3-16 PackagesJQo嘉泰姆
18.)Lead Free and Green Devices AvailableJQo嘉泰姆
三,应用范围 (Applications)JQo嘉泰姆

PCI Express Graphical Processing UnitJQo嘉泰姆
Notebook AdapterJQo嘉泰姆
Auxiliary Power RailJQo嘉泰姆
VRMJQo嘉泰姆
四.下载产品资料PDF文档 JQo嘉泰姆

需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！JQo嘉泰姆

 JQo嘉泰姆

五,产品封装图 (Package)JQo嘉泰姆

JQo嘉泰姆

六.电路原理图JQo嘉泰姆

JQo嘉泰姆
七,功能概述JQo嘉泰姆

Power Good IndicatorJQo嘉泰姆
The CXSD6292 features an open-drain PGOOD output pin to indicate one of the IC’s working statuses JQo嘉泰姆

including soft-start, under-voltage fault, over-current fault, and over-voltage faule. The unique fault-JQo嘉泰姆

identification capability can drastically reduce trouble-shooting time and effort.JQo嘉泰姆
The pull-down resistance of the PGOOD pin correspondsto the fault status of the controller. During JQo嘉泰姆

soft-start or if an under voltage fault occurs, the PGOOD pull-down re-sistance is 95Ω, or 32Ω for JQo嘉泰姆

an over current fault, or 63Ω for an over voltage fault. The pull-low resistance is unde-fined if VCC JQo嘉泰姆

is below the rising/falling POR threshold.JQo嘉泰姆
Over-Temperature Protection (OTP)JQo嘉泰姆
When the junction temperature increases above the ris-ing threshold temperature TOTR, the IC JQo嘉泰姆

will enter the over-temperature protection (OTP) state that suspends the PWM, which forces the JQo嘉泰姆

LG and UG gate drivers to output low voltages. The status of the PGOOD pin does not change, norJQo嘉泰姆

 does the converter latch-off. The thermal sensor allows the converters to start a start-up process JQo嘉泰姆

and regulate the output voltage again after the junction temperature cools by 25oC. The OTP is JQo嘉泰姆

designed with a 25oC hysteresis to lower the average TJ during continu-ous thermal overload JQo嘉泰姆

conditions, which increases life- time of the CXSD6292.JQo嘉泰姆

Over-Current Protection (OCP) and Short-Circuit Pro-tection (SCP)JQo嘉泰姆
The over-current protection (OCP) is designed to resist the slow slew rate load current; on the otherJQo嘉泰姆

 hand, the short-circuit protection (SCP) is used to take care of rapid shorted output. The setpoint forJQo嘉泰姆

 OCP and SCP is pro-grammed with resistor RSEN that is connected across the ISEN pin and drain ofJQo嘉泰姆

 the low-side MOSFET. The SCP setpoint is internally set to twice the OCP setpoint.JQo嘉泰姆
The inductor current develops a negative voltage across the RDS(ON) of the low-side MOSFET that isJQo嘉泰姆

 sampled and held shortly before LG gate-driver output goes low. The OCP fault occurs if ISEN rises JQo嘉泰姆

above the OCP threshold current IOC (typical :26μA) while attempting to null the nega-tive voltage JQo嘉泰姆

across the PHASE and GND pins. When the ISEN exceeds IOC, the OCP counter starts to work.JQo嘉泰姆
Meanwhile, pulses on all the PWM (ISEN > IOC) remains for 20μs, the OCP will be triggered. When JQo嘉泰姆

ISEN falls below IOC on a PWM pulses before 20μs has elapsed, the counter will be reset. The SCPJQo嘉泰姆

 fault will occur within 10μs when I SEN exceeds twice I OC. The relationship between the sampled JQo嘉泰姆

current and MOSFET current is given by:JQo嘉泰姆
ISEN × RSEN = RDS ( ON ) × ILJQo嘉泰姆
Which means the current sensing pin will source current to make the voltage drop on the MOSFET JQo嘉泰姆

and is equal to the voltage generated on the sensing resistor along the ISEN pin current flowing path.JQo嘉泰姆
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