目录kPj嘉泰姆

1.产品概述                       2.产品特点kPj嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 kPj嘉泰姆
5.产品封装图                     6.电路原理图                   kPj嘉泰姆
7.功能概述                        8.相关产品kPj嘉泰姆

一,产品概述(General Description)    kPj嘉泰姆

      The CXSD6285 integrates Dual PWM buck controllers and an internal linear regulator for DDR memory and MCH power solution. The two synchronous PWM buck control-lers drive four N-channel MOSFETs for DDR memory sup-ply voltage (VDDQ) and MCH regulator. The internal regu-lator is designed to track at the half of the reference volt-age with sourcing and sinking current for DDR memory termination regulator (VTT).kPj嘉泰姆
        The CXSD6285 uses the latched BUF_Cut signal and the POR of the BOOT to comply with ACPI power sequencing specifications. The two PWM regulators also provide POKsignals to indicate that the regulators are good. The de-vice also has the phase shift function between the two PWM controllers. The protection functions of the two PWM controllers include over-current protection, under-voltage protection, and external soft-start function. The VTT regu-lator provides 2A sinking and sourcing current-limit func-tion and also has thermal shutdown protection.kPj嘉泰姆
        The TSSOP-24P package with a copper pad provides excellent thermal impedance is available.kPj嘉泰姆
二.产品特点(Features)kPj嘉泰姆

1.）Provide Synchronous Rectified Buck PWM Controllers for VDDQ and        VMCHkPj嘉泰姆
2.）Integrated Power FETs with VTT RegulatorkPj嘉泰姆
       Source/Sink up to 2.0AkPj嘉泰姆
3.）Drive Low Cost N-Channel Power MOSFETskPj嘉泰姆
4.）Internal 0.8V Reference Voltage for AdjustablekPj嘉泰姆
      VDDQ and VMCHkPj嘉泰姆
5.）Thermal ShutdownkPj嘉泰姆
6.）VTT Tracks at Half the Reference VoltagekPj嘉泰姆
7.）Fixed Switching Frequency of 250kHz for VDDQkPj嘉泰姆
     and VMCHkPj嘉泰姆
8.）Over-Current Protection and Under-VoltagekPj嘉泰姆
      Protection for VDDQ and VMCHkPj嘉泰姆
9.）Fully Complies with ACPI Power SequencingkPj嘉泰姆
      SpecificationskPj嘉泰姆
10.）180 degrees Phase Shift between VDDQ and VMCHkPj嘉泰姆
11.）Power-OK Function for VDDQ and VMCHkPj嘉泰姆
12.）Fast Transient ResponsekPj嘉泰姆
       Maximum Duty Cycle 90%kPj嘉泰姆
       High-Bandwidth Error AmplifierkPj嘉泰姆
13.）Simple Single-Loop Control DesignkPj嘉泰姆
      Voltage Mode PWM ControlkPj嘉泰姆
      External Compensation
14.）External Soft-Start for VDDQ and VMCHkPj嘉泰姆
15.）Shutdown Function for VDDQ/VTT and VMCHkPj嘉泰姆
16.）Thermally Enhanced TSSOP-24P PackagekPj嘉泰姆
17.）Lead Free and Green Devices Available (RoHS Compliant)kPj嘉泰姆
三,应用范围 (Applications)kPj嘉泰姆

 DDR Memory and MCH Power SupplykPj嘉泰姆
四.下载产品资料PDF文档 kPj嘉泰姆

需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！kPj嘉泰姆

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五,产品封装图 (Package)kPj嘉泰姆

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六.电路原理图kPj嘉泰姆

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七,功能概述kPj嘉泰姆

Output Inductor SelectionkPj嘉泰姆
The inductor value determines the inductor ripple current and affects the load transient response.kPj嘉泰姆
Higher inductor value reduces the inductor’s ripple current and induces lower output ripple voltage.kPj嘉泰姆
The ripple current and ripple voltage can be approximated by:where FS is the switching frequencykPj嘉泰姆
of the regulator.Although increases the inductor value to reduce the ripple current and voltage, therekPj嘉泰姆
is a tradeoff existing between the inductor’s ripple current and the regulator load tran-sient response time.kPj嘉泰姆
A smaller inductor will give the regulator a faster load transient response at the expense of higher ripple current.kPj嘉泰姆
The maximum ripple current occurs at the maximum in-put voltage. A good starting point is to choosekPj嘉泰姆
the ripple current to be approximately 30% of the maximum output current.Once the inductance valuekPj嘉泰姆
has been chosen, select an inductor that is capable of carrying the required peak cur-rent without goingkPj嘉泰姆
into saturation. In some types of inductors, especially core that is make of ferrite, the ripple current willkPj嘉泰姆
increase abruptly when it saturates. This will result in a larger output ripple voltage.kPj嘉泰姆
Output Capacitor SelectionkPj嘉泰姆
Higher Capacitor value and lower ESR reduce the output ripple and the load transient drop. Therefore,kPj嘉泰姆
select high performance low ESR capacitors are intended for switch-ing regulator applications.kPj嘉泰姆
In some applications, mul-tiple capacitors have to be parallelled to achieve the de-sired ESR value.kPj嘉泰姆
A small decoupling capacitor in parallel for bypassing the noise is also recommended, and thekPj嘉泰姆
voltage rating of the output capacitors also must be considered. If tantalum capacitors are used,kPj嘉泰姆
make sure they are surge tested by the manufactures. If in doubt, consult the capacitors manufacturer.kPj嘉泰姆
Input Capacitor SelectionkPj嘉泰姆
The input capacitor is chosen based on the voltage rat-ing and the RMS current rating. For reliablekPj嘉泰姆
operation,select the capacitor voltage rating to be at least 1.3 times higher than the maximum input voltage.kPj嘉泰姆
The maximum RMS current rating requirement is approximately IOUT/2,where IOUT is the load current.kPj嘉泰姆
During power-up, the input capacitors have to handle large amount of surge current.kPj嘉泰姆
If tantalum capacitors are used, make sure they are surge tested by the manufactures. If in doubt,kPj嘉泰姆
consult the ca- pacitors manufacturer. For high frequency decoupling, a ceramic capacitor 1μF can bekPj嘉泰姆
connected between the drain of upper MOSFET and the source of lower MOSFET.kPj嘉泰姆
MOSFET SelectionkPj嘉泰姆
The selection of the N-channel power MOSFETs are de-termined by the RDS(ON), reverse transferkPj嘉泰姆
capacitance(CRSS)and maximum output current requirement. The losses in the MOSFETs have twokPj嘉泰姆
components: conduction loss and transition loss. For the upper and lower MOSFET, the losses arekPj嘉泰姆
approximately given by the following equations:kPj嘉泰姆
MOSFET Selection (Cont.)kPj嘉泰姆
PUPPER = IOUT 2(1+ TC)(RDS(ON))D + (0.5)(IOUT)(VIN)(tSW)FSkPj嘉泰姆
PLOWER = IOUT 2(1+ TC)(RDS(ON))(1-D)kPj嘉泰姆
where IOUT is the load currentkPj嘉泰姆
TC is the temperature dependency of RDS(ON)kPj嘉泰姆
FS is the switching frequencykPj嘉泰姆
tSW is the switching intervalkPj嘉泰姆
D is the duty cyclekPj嘉泰姆
Note that both MOSFETs have conduction losses while the upper MOSFET includes an additional transitionkPj嘉泰姆
loss.The switching internal, tSW, is the function of the reverse transfer capacitance CRSS. The (1+TC) termkPj嘉泰姆
is to factor in the temperature dependency of the RDS(ON) and can be extracted from the “RDS(ON) vskPj嘉泰姆
Temperature” curve of the power MOSFET.kPj嘉泰姆
Layout ConsiderationkPj嘉泰姆
In high power switching regulator, a correct layout is im-portant to ensure proper operation of the regulator. InkPj嘉泰姆
general, interconnecting impedances should be mini-mized by using short and wide printed circuit traces. Sig-kPj嘉泰姆
nal and power grounds are to be kept separating and finally combined to use ground plane construction orkPj嘉泰姆
single point grounding. Figure 14 illustrates the layout,with bold lines indicating high current paths; these traceskPj嘉泰姆
must be short and wide. Components along the boldlines should be placed close together.kPj嘉泰姆
Below is a checklist for your layout:kPj嘉泰姆
·-The metal plate of the bottom of the packages (TSSOP-24P) must be soldered to the PCB and con-nect tokPj嘉泰姆
the GND plane on the backside through sev-eral thermal vias. More vias is better for heatsink.kPj嘉泰姆
·-Keep the switching nodes (UGATE, LGATE, and PHASE) away from sensitive small signal nodeskPj嘉泰姆
since these nodes are fast moving signals. Therefore,keep traces to these nodes as short as possible.kPj嘉泰姆
· Connet the FB and VTTFB to point of load and the REFSEN should be connected to the point of load ofkPj嘉泰姆
the VDDQ output.kPj嘉泰姆
· The traces from the gate drivers to the MOSFETs (UG1,LG1, UG2, and LG2) should be short and wide.kPj嘉泰姆
Decoupling capacitor, compensation component, the resistor dividers, boot capacitors, and SS capacitorskPj嘉泰姆
should be close to their pins.kPj嘉泰姆
The input capacitor should be near the drain of the upper MOSFET; the output capacitor should be nearkPj嘉泰姆
the loads.kPj嘉泰姆
The input capacitor GND should be close to the out-put capacitor GND and the lower MOSFET GND.kPj嘉泰姆
The drain of the MOSFETs (VIN and phase nodes)kPj嘉泰姆
should be a large plane for heat sinking.kPj嘉泰姆

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