目录0jv嘉泰姆

1.产品概述                       2.产品特点0jv嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 0jv嘉泰姆
5.产品封装图                     6.电路原理图                   0jv嘉泰姆
7.功能概述                        8.相关产品0jv嘉泰姆

一,产品概述(General Description)      0jv嘉泰姆

                The CXSD6279B is a voltage mode and synchronous PWM controller0jv嘉泰姆
which drives dual N-Channel MOSFETs. It inte-grates the control, monitoring,0jv嘉泰姆
and protection functions into a single package, provides one controlled power0jv嘉泰姆
outputs with under-voltage and over-current protection.CXSD6279B provides0jv嘉泰姆
excellent regulation for output load variation. An internal 0.8V temperature-0jv嘉泰姆
compensated reference voltage is designed to meet the requirement of0jv嘉泰姆
low output voltage applications. It includes a 200kHz free-running0jv嘉泰姆
triangle-wave oscillator that is adjustable from 70kHz to 800kHz.0jv嘉泰姆
        The power-on-reset (POR) circuit monitors the VCC, EN,and OCSET0jv嘉泰姆
input voltage to start-up or shutdown the IC.The over-current protection (OCP)0jv嘉泰姆
monitors the output current by using the voltage drop across the upper0jv嘉泰姆
MOSFET’s RDS(ON), eliminating the need for a current sens-ing resistor.0jv嘉泰姆
The under-voltage protection (UVP) moni-tors the voltage of the FB pin for0jv嘉泰姆
short-circuit protection.The over-current protection trip cycle the soft-start0jv嘉泰姆
func-tion until the fault events be removed. Under-voltage pro-tection will0jv嘉泰姆
shutdown the IC directly.0jv嘉泰姆
二.产品特点(Features)0jv嘉泰姆

1.)Simple Single-Loop Control Design0jv嘉泰姆
   Voltage-Mode PWM Control0jv嘉泰姆
2.)Fast Transient Response0jv嘉泰姆
    Full 0–100% Duty Ratio0jv嘉泰姆
3.)Excellent Output Voltage Regulation0jv嘉泰姆
   0.8V Internal Reference0jv嘉泰姆
    ± 1% Over Line Voltage and Temperature0jv嘉泰姆
4.)Over Current Fault Monitor0jv嘉泰姆
   Uses Upper MOSFETs RDS (ON)0jv嘉泰姆
5.)Converter Can Source and Sink Current0jv嘉泰姆
6.)Small Converter Size0jv嘉泰姆
    200kHz Free-Running Oscillator0jv嘉泰姆
   Programmable from 70kHz to 800kHz0jv嘉泰姆
7.)14-Lead SOIC Package0jv嘉泰姆
8.)Lead Free and Green Devices Available (RoHS Compliant)0jv嘉泰姆
三,应用范围 (Applications)0jv嘉泰姆

Graphic Cards0jv嘉泰姆
DDR Memory Power Supply0jv嘉泰姆
DDR Memory Termination Voltage0jv嘉泰姆
Low-Voltage Distributed Power Supplies0jv嘉泰姆
四.下载产品资料PDF文档 0jv嘉泰姆

需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！0jv嘉泰姆

 0jv嘉泰姆

五,产品封装图 (Package)0jv嘉泰姆

0jv嘉泰姆
RT (Pin1)0jv嘉泰姆
This pin can adjust the switching frequency. Connect a resistor from the RT to the GND for increasing the switch-0jv嘉泰姆
OCSET (Pin2)0jv嘉泰姆
This pin serves two functions: a shutdown control and the setting of over current-limit threshold. Pulling this pin0jv嘉泰姆
below 1.27V will shutdown the controller, forcing the UGATE and LGATE signals to be at 0V.0jv嘉泰姆
A resistor (Rocset) connected between this pin and the drain of the high side MOSFET will determine the over 0jv嘉泰姆

current limit. An internal 200μA current source will flow through this resistor, creating a voltage drop, which 0jv嘉泰姆

will be com-pared with the voltage across the high side MOSFET.0jv嘉泰姆
SS (Pin3)0jv嘉泰姆
Connect a capacitor from the pin to the GND to set the soft-start interval of the converter. An internal 10μA 0jv嘉泰姆

current source charges this capacitor to 5.8V. The SS voltage clamps the error amplifier output, and Figure10jv嘉泰姆

 shows the soft-start interval. At t1, the SS voltage reaches the valley of the oscillator’s triangle wave. The0jv嘉泰姆

PWM comparator starts to generate a PWM signal to control logic, and the0jv嘉泰姆
COMP (Pin4)0jv嘉泰姆
This pin is the output of the error amplifier. Add an exter-nal resistor and capacitor network to provide the0jv嘉泰姆

 loop com- pensation for the PW M converter (see Application Information).0jv嘉泰姆
FB (Pin5)0jv嘉泰姆
FB pin is the inverter input of the error amplifier and it receives the feedback voltage from an external 0jv嘉泰姆

resis-tive divider across the output (V OUT). The output voltage is determined by:0jv嘉泰姆
EN (Pin6)0jv嘉泰姆
Pull the pin higher than 2V to enable the device, and pull the pin lower than 0.8V to shutdown the 0jv嘉泰姆

device. In shutdown, the SS is discharged and the UGATE and LGATE pins are held low. The EN pin 0jv嘉泰姆

is the open-collector, and it will not be floating. 0jv嘉泰姆
GND (Pin7)0jv嘉泰姆
Signal ground for the IC. 0jv嘉泰姆
PHASE (Pin8)0jv嘉泰姆
This pin is connected to the source of the high-side MOSFET and is used to monitor the voltage drop0jv嘉泰姆

 across the high-side MOSFET for over-current protection. 0jv嘉泰姆
UGATE (Pin9)0jv嘉泰姆
Connect the pin to external MOSFET, and provides the gate drive for the upper MOSFET.0jv嘉泰姆

BOOT (Pin 10)0jv嘉泰姆
This pin provides the supply voltage to the high side MOSFET driver. For driving logic level N-channel 0jv嘉泰姆

MOSEFT,a bootstrap circuit can be used to create a suitable driver’s supply. 0jv嘉泰姆
PGND (Pin11)0jv嘉泰姆
Power ground for the gate diver. Connect the lower MOSFET source to this pin. 0jv嘉泰姆
LGATE (Pin 12)0jv嘉泰姆

Connect the pin to the external MOSFET, and provides the gate drive signal for the lower MOSFET.0jv嘉泰姆
PVCC (Pin13)0jv嘉泰姆
This pin provides a supply voltage for the lower gate drive, connect it to the VCC pin in common use. 0jv嘉泰姆
VCC (Pin14)0jv嘉泰姆
This pin provides a supply voltage for the device. When the VCC is above the rising threshold 10.4V, 0jv嘉泰姆

the device is turned on; conversely, when the VCC is below the falling threshold, the device is turned off.0jv嘉泰姆
六.电路原理图0jv嘉泰姆

0jv嘉泰姆
七,功能概述0jv嘉泰姆

Output Capacitor Selection0jv嘉泰姆
The selection of COUT is determined by the required effec-tive series resistance (ESR) and voltage rating0jv嘉泰姆

 rather than the actual capacitance requirement. Therefore, select highperformance low ESR capacitors 0jv嘉泰姆

that are intended for switching regulator applications. In some applications,multiple capacitors have to0jv嘉泰姆

 be paralled to achieve the desired ESR value. If tantalum capacitors are used, makesure they are surge0jv嘉泰姆

 tested by the manufactures. If in doubt,consult the capacitors manufacturer.0jv嘉泰姆
 Input Capacitor Selection0jv嘉泰姆
The input capacitor is chosen based on the voltage rating and the RMS current rating. For reliable 0jv嘉泰姆

operation, select the capacitor voltage rating to be at least 1.3 times higher than the maximum input0jv嘉泰姆

 voltage. The maximum RMS current rating requirement is approximately IOUT/2 , where IOUT is the 0jv嘉泰姆

load current. During power up, the input capaci-tors have to handle large amount of surge current.0jv嘉泰姆

 If tanta-lum capacitors are used, make sure they are surge tested by the manufactures. If in doubt, 0jv嘉泰姆

consult the capacitors manufacturer.For high frequency decoupling, a ceramic capacitor be-tween0jv嘉泰姆

 0.1μF to 1μF can be connected between the VCC and the ground pin.0jv嘉泰姆
Inductor Selection0jv嘉泰姆
The inductance of the inductor is determined by the out-put voltage requirement. The larger the 0jv嘉泰姆

inductance, the lower the inductor’s current ripple. This will translate into lower output ripple voltage.0jv嘉泰姆

 The ripple current and ripple voltage can be approximated by:0jv嘉泰姆
where Fs is the switching frequency of the regulator.There is a tradeoff exists between the inductor’s0jv嘉泰姆

 ripple current and the regulator load transient response time. A smaller inductor will give the regulator 0jv嘉泰姆

a faster load tran-sient response at the expense of higher ripple current and vice versa. The maximum0jv嘉泰姆

 ripple current occurs at the maximum input voltage. A good starting point is to choose the ripple 0jv嘉泰姆

current to be approximately 30% of the maxi-mum output current.Once the inductance value has 0jv嘉泰姆

been chosen, select an inductor that is capable of carrying the required peak cur-rent without going 0jv嘉泰姆

into saturation. In some types of inductors, especially core that is make of ferrite, the ripple0jv嘉泰姆
current will increase abruptly when it saturates. This will result in a larger output ripple voltage.0jv嘉泰姆
Compensation0jv嘉泰姆
The output LC filter introduces a double pole, which con-tributes with –40dB/decade gain slope and 0jv嘉泰姆

180 degrees phase shift in the control loop. A compensation network between the COMP pin and the 0jv嘉泰姆

ground should be added. The simplest loop compensation network is shown in0jv嘉泰姆
Figure 5.0jv嘉泰姆
The output LC filter consists of the output inductor and output capacitors. The transfer function of0jv嘉泰姆

 the LC filter is given by:0jv嘉泰姆
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