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CXSD6279B电压模式和同步PWM控制器驱动双N通道mosfet控制监视和保护功能受控电源带欠压和过流保护的输出
发表时间:2020-04-21浏览次数:176
CXSD6279B电压模式和同步PWM控制器驱动双N通道mosfet控制监视和保护功能受控电源带欠压和过流保护的输出
 

目录S6Q嘉泰姆

1.产品概述                       2.产品特点S6Q嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 S6Q嘉泰姆
5.产品封装图                     6.电路原理图                   S6Q嘉泰姆
7.功能概述                        8.相关产品S6Q嘉泰姆

一,产品概述(General Description)      S6Q嘉泰姆


                The CXSD6279B is a voltage mode and synchronous PWM controllerS6Q嘉泰姆
which drives dual N-Channel MOSFETs. It inte-grates the control, monitoring,S6Q嘉泰姆
and protection functions into a single package, provides one controlled powerS6Q嘉泰姆
outputs with under-voltage and over-current protection.CXSD6279B providesS6Q嘉泰姆
excellent regulation for output load variation. An internal 0.8V temperature-S6Q嘉泰姆
compensated reference voltage is designed to meet the requirement ofS6Q嘉泰姆
low output voltage applications. It includes a 200kHz free-runningS6Q嘉泰姆
triangle-wave oscillator that is adjustable from 70kHz to 800kHz.S6Q嘉泰姆
        The power-on-reset (POR) circuit monitors the VCC, EN,and OCSETS6Q嘉泰姆
input voltage to start-up or shutdown the IC.The over-current protection (OCP)S6Q嘉泰姆
monitors the output current by using the voltage drop across the upperS6Q嘉泰姆
MOSFET’s RDS(ON), eliminating the need for a current sens-ing resistor.S6Q嘉泰姆
The under-voltage protection (UVP) moni-tors the voltage of the FB pin forS6Q嘉泰姆
short-circuit protection.The over-current protection trip cycle the soft-startS6Q嘉泰姆
func-tion until the fault events be removed. Under-voltage pro-tection willS6Q嘉泰姆
shutdown the IC directly.S6Q嘉泰姆
二.产品特点(Features)S6Q嘉泰姆


1.)Simple Single-Loop Control DesignS6Q嘉泰姆
   Voltage-Mode PWM ControlS6Q嘉泰姆
2.)Fast Transient ResponseS6Q嘉泰姆
    Full 0–100% Duty RatioS6Q嘉泰姆
3.)Excellent Output Voltage RegulationS6Q嘉泰姆
   0.8V Internal ReferenceS6Q嘉泰姆
    ± 1% Over Line Voltage and TemperatureS6Q嘉泰姆
4.)Over Current Fault MonitorS6Q嘉泰姆
   Uses Upper MOSFETs RDS (ON)S6Q嘉泰姆
5.)Converter Can Source and Sink CurrentS6Q嘉泰姆
6.)Small Converter SizeS6Q嘉泰姆
    200kHz Free-Running OscillatorS6Q嘉泰姆
   Programmable from 70kHz to 800kHzS6Q嘉泰姆
7.)14-Lead SOIC PackageS6Q嘉泰姆
8.)Lead Free and Green Devices Available (RoHS Compliant)S6Q嘉泰姆
三,应用范围 (Applications)S6Q嘉泰姆


Graphic CardsS6Q嘉泰姆
DDR Memory Power SupplyS6Q嘉泰姆
DDR Memory Termination VoltageS6Q嘉泰姆
Low-Voltage Distributed Power SuppliesS6Q嘉泰姆
四.下载产品资料PDF文档 S6Q嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持S6Q嘉泰姆

 QQ截图20160419174301.jpgS6Q嘉泰姆

五,产品封装图 (Package)S6Q嘉泰姆


S6Q嘉泰姆
RT (Pin1)S6Q嘉泰姆
This pin can adjust the switching frequency. Connect a resistor from the RT to the GND for increasing the switch-S6Q嘉泰姆
OCSET (Pin2)S6Q嘉泰姆
This pin serves two functions: a shutdown control and the setting of over current-limit threshold. Pulling this pinS6Q嘉泰姆
below 1.27V will shutdown the controller, forcing the UGATE and LGATE signals to be at 0V.S6Q嘉泰姆
A resistor (Rocset) connected between this pin and the drain of the high side MOSFET will determine the over S6Q嘉泰姆

current limit. An internal 200μA current source will flow through this resistor, creating a voltage drop, which S6Q嘉泰姆

will be com-pared with the voltage across the high side MOSFET.S6Q嘉泰姆
SS (Pin3)S6Q嘉泰姆
Connect a capacitor from the pin to the GND to set the soft-start interval of the converter. An internal 10μA S6Q嘉泰姆

current source charges this capacitor to 5.8V. The SS voltage clamps the error amplifier output, and Figure1S6Q嘉泰姆

 shows the soft-start interval. At t1, the SS voltage reaches the valley of the oscillator’s triangle wave. TheS6Q嘉泰姆

PWM comparator starts to generate a PWM signal to control logic, and theS6Q嘉泰姆
COMP (Pin4)S6Q嘉泰姆
This pin is the output of the error amplifier. Add an exter-nal resistor and capacitor network to provide theS6Q嘉泰姆

 loop com- pensation for the PW M converter (see Application Information).S6Q嘉泰姆
FB (Pin5)S6Q嘉泰姆
FB pin is the inverter input of the error amplifier and it receives the feedback voltage from an external S6Q嘉泰姆

resis-tive divider across the output (V OUT). The output voltage is determined by:S6Q嘉泰姆
EN (Pin6)S6Q嘉泰姆
Pull the pin higher than 2V to enable the device, and pull the pin lower than 0.8V to shutdown the S6Q嘉泰姆

device. In shutdown, the SS is discharged and the UGATE and LGATE pins are held low. The EN pin S6Q嘉泰姆

is the open-collector, and it will not be floating. S6Q嘉泰姆
GND (Pin7)S6Q嘉泰姆
Signal ground for the IC. S6Q嘉泰姆
PHASE (Pin8)S6Q嘉泰姆
This pin is connected to the source of the high-side MOSFET and is used to monitor the voltage dropS6Q嘉泰姆

 across the high-side MOSFET for over-current protection. S6Q嘉泰姆
UGATE (Pin9)S6Q嘉泰姆
Connect the pin to external MOSFET, and provides the gate drive for the upper MOSFET.S6Q嘉泰姆

BOOT (Pin 10)S6Q嘉泰姆
This pin provides the supply voltage to the high side MOSFET driver. For driving logic level N-channel S6Q嘉泰姆

MOSEFT,a bootstrap circuit can be used to create a suitable driver’s supply. S6Q嘉泰姆
PGND (Pin11)S6Q嘉泰姆
Power ground for the gate diver. Connect the lower MOSFET source to this pin. S6Q嘉泰姆
LGATE (Pin 12)S6Q嘉泰姆

Connect the pin to the external MOSFET, and provides the gate drive signal for the lower MOSFET.S6Q嘉泰姆
PVCC (Pin13)S6Q嘉泰姆
This pin provides a supply voltage for the lower gate drive, connect it to the VCC pin in common use. S6Q嘉泰姆
VCC (Pin14)S6Q嘉泰姆
This pin provides a supply voltage for the device. When the VCC is above the rising threshold 10.4V, S6Q嘉泰姆

the device is turned on; conversely, when the VCC is below the falling threshold, the device is turned off.S6Q嘉泰姆
六.电路原理图S6Q嘉泰姆


blob.pngS6Q嘉泰姆
七,功能概述S6Q嘉泰姆


Output Capacitor SelectionS6Q嘉泰姆
The selection of COUT is determined by the required effec-tive series resistance (ESR) and voltage ratingS6Q嘉泰姆

 rather than the actual capacitance requirement. Therefore, select highperformance low ESR capacitors S6Q嘉泰姆

that are intended for switching regulator applications. In some applications,multiple capacitors have toS6Q嘉泰姆

 be paralled to achieve the desired ESR value. If tantalum capacitors are used, makesure they are surgeS6Q嘉泰姆

 tested by the manufactures. If in doubt,consult the capacitors manufacturer.S6Q嘉泰姆
 Input Capacitor SelectionS6Q嘉泰姆
The input capacitor is chosen based on the voltage rating and the RMS current rating. For reliable S6Q嘉泰姆

operation, select the capacitor voltage rating to be at least 1.3 times higher than the maximum inputS6Q嘉泰姆

 voltage. The maximum RMS current rating requirement is approximately IOUT/2 , where IOUT is the S6Q嘉泰姆

load current. During power up, the input capaci-tors have to handle large amount of surge current.S6Q嘉泰姆

 If tanta-lum capacitors are used, make sure they are surge tested by the manufactures. If in doubt, S6Q嘉泰姆

consult the capacitors manufacturer.For high frequency decoupling, a ceramic capacitor be-tweenS6Q嘉泰姆

 0.1μF to 1μF can be connected between the VCC and the ground pin.S6Q嘉泰姆
Inductor SelectionS6Q嘉泰姆
The inductance of the inductor is determined by the out-put voltage requirement. The larger the S6Q嘉泰姆

inductance, the lower the inductor’s current ripple. This will translate into lower output ripple voltage.S6Q嘉泰姆

 The ripple current and ripple voltage can be approximated by:S6Q嘉泰姆
where Fs is the switching frequency of the regulator.There is a tradeoff exists between the inductor’sS6Q嘉泰姆

 ripple current and the regulator load transient response time. A smaller inductor will give the regulator S6Q嘉泰姆

a faster load tran-sient response at the expense of higher ripple current and vice versa. The maximumS6Q嘉泰姆

 ripple current occurs at the maximum input voltage. A good starting point is to choose the ripple S6Q嘉泰姆

current to be approximately 30% of the maxi-mum output current.Once the inductance value has S6Q嘉泰姆

been chosen, select an inductor that is capable of carrying the required peak cur-rent without going S6Q嘉泰姆

into saturation. In some types of inductors, especially core that is make of ferrite, the rippleS6Q嘉泰姆
current will increase abruptly when it saturates. This will result in a larger output ripple voltage.S6Q嘉泰姆
CompensationS6Q嘉泰姆
The output LC filter introduces a double pole, which con-tributes with –40dB/decade gain slope and S6Q嘉泰姆

180 degrees phase shift in the control loop. A compensation network between the COMP pin and the S6Q嘉泰姆

ground should be added. The simplest loop compensation network is shown inS6Q嘉泰姆
Figure 5.S6Q嘉泰姆
The output LC filter consists of the output inductor and output capacitors. The transfer function ofS6Q嘉泰姆

 the LC filter is given by:S6Q嘉泰姆
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SOP8|TSSOP8S6Q嘉泰姆

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1S6Q嘉泰姆

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5S6Q嘉泰姆

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13.2S6Q嘉泰姆

1.25|0.8S6Q嘉泰姆

5~12S6Q嘉泰姆

3000S6Q嘉泰姆

CXSD6278S6Q嘉泰姆

SOP-8S6Q嘉泰姆

VMS6Q嘉泰姆

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