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首页 > 产品中心 > 电源管理 > DC降压型芯片 > Buck降压型芯片 >CXSD6279B电压模式和同步PWM控制器驱动双N通道mosfet控制监视和保护功能受控电源带欠压和过流保护的输出
CXSD6279B电压模式和同步PWM控制器驱动双N通道mosfet控制监视和保护功能受控电源带欠压和过流保护的输出
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CXSD6279B提供输出负载变化的良好调节。内部0.8V温度-补偿参考电压的设计满足
低输出电压应用。它包括一个200kHz的自由运行三角波振荡器,可从70kHz调整到800kHz。上电复位(POR)电路监控VCC、EN和OCSET启动或关闭集成电路的输入电压。过电流保护(OCP)使用上部的电压降监测输出电流MOSFET的RDS(开),消除了对电流传感电阻的需要。欠压保护(UVP)监测FB引脚的电压短路保护

CXSD6279B电压模式和同步PWM控制器驱动双N通道mosfet控制监视和保护功能受控电源带欠压和过流保护的输出
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目录FBN嘉泰姆

1.产品概述                       2.产品特点FBN嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 FBN嘉泰姆
5.产品封装图                     6.电路原理图                   FBN嘉泰姆
7.功能概述                        8.相关产品FBN嘉泰姆

一,产品概述(General Description)      FBN嘉泰姆


                The CXSD6279B is a voltage mode and synchronous PWM controllerFBN嘉泰姆
which drives dual N-Channel MOSFETs. It inte-grates the control, monitoring,FBN嘉泰姆
and protection functions into a single package, provides one controlled powerFBN嘉泰姆
outputs with under-voltage and over-current protection.CXSD6279B providesFBN嘉泰姆
excellent regulation for output load variation. An internal 0.8V temperature-FBN嘉泰姆
compensated reference voltage is designed to meet the requirement ofFBN嘉泰姆
low output voltage applications. It includes a 200kHz free-runningFBN嘉泰姆
triangle-wave oscillator that is adjustable from 70kHz to 800kHz.FBN嘉泰姆
        The power-on-reset (POR) circuit monitors the VCC, EN,and OCSETFBN嘉泰姆
input voltage to start-up or shutdown the IC.The over-current protection (OCP)FBN嘉泰姆
monitors the output current by using the voltage drop across the upperFBN嘉泰姆
MOSFET’s RDS(ON), eliminating the need for a current sens-ing resistor.FBN嘉泰姆
The under-voltage protection (UVP) moni-tors the voltage of the FB pin forFBN嘉泰姆
short-circuit protection.The over-current protection trip cycle the soft-startFBN嘉泰姆
func-tion until the fault events be removed. Under-voltage pro-tection willFBN嘉泰姆
shutdown the IC directly.FBN嘉泰姆
二.产品特点(Features)FBN嘉泰姆


1.)Simple Single-Loop Control DesignFBN嘉泰姆
   Voltage-Mode PWM ControlFBN嘉泰姆
2.)Fast Transient ResponseFBN嘉泰姆
    Full 0–100% Duty RatioFBN嘉泰姆
3.)Excellent Output Voltage RegulationFBN嘉泰姆
   0.8V Internal ReferenceFBN嘉泰姆
    ± 1% Over Line Voltage and TemperatureFBN嘉泰姆
4.)Over Current Fault MonitorFBN嘉泰姆
   Uses Upper MOSFETs RDS (ON)FBN嘉泰姆
5.)Converter Can Source and Sink CurrentFBN嘉泰姆
6.)Small Converter SizeFBN嘉泰姆
    200kHz Free-Running OscillatorFBN嘉泰姆
   Programmable from 70kHz to 800kHzFBN嘉泰姆
7.)14-Lead SOIC PackageFBN嘉泰姆
8.)Lead Free and Green Devices Available (RoHS Compliant)FBN嘉泰姆
三,应用范围 (Applications)FBN嘉泰姆


Graphic CardsFBN嘉泰姆
DDR Memory Power SupplyFBN嘉泰姆
DDR Memory Termination VoltageFBN嘉泰姆
Low-Voltage Distributed Power SuppliesFBN嘉泰姆
四.下载产品资料PDF文档 FBN嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持FBN嘉泰姆

 QQ截图20160419174301.jpgFBN嘉泰姆

五,产品封装图 (Package)FBN嘉泰姆


FBN嘉泰姆
RT (Pin1)FBN嘉泰姆
This pin can adjust the switching frequency. Connect a resistor from the RT to the GND for increasing the switch-FBN嘉泰姆
OCSET (Pin2)FBN嘉泰姆
This pin serves two functions: a shutdown control and the setting of over current-limit threshold. Pulling this pinFBN嘉泰姆
below 1.27V will shutdown the controller, forcing the UGATE and LGATE signals to be at 0V.FBN嘉泰姆
A resistor (Rocset) connected between this pin and the drain of the high side MOSFET will determine the over FBN嘉泰姆

current limit. An internal 200μA current source will flow through this resistor, creating a voltage drop, which FBN嘉泰姆

will be com-pared with the voltage across the high side MOSFET.FBN嘉泰姆
SS (Pin3)FBN嘉泰姆
Connect a capacitor from the pin to the GND to set the soft-start interval of the converter. An internal 10μA FBN嘉泰姆

current source charges this capacitor to 5.8V. The SS voltage clamps the error amplifier output, and Figure1FBN嘉泰姆

 shows the soft-start interval. At t1, the SS voltage reaches the valley of the oscillator’s triangle wave. TheFBN嘉泰姆

PWM comparator starts to generate a PWM signal to control logic, and theFBN嘉泰姆
COMP (Pin4)FBN嘉泰姆
This pin is the output of the error amplifier. Add an exter-nal resistor and capacitor network to provide theFBN嘉泰姆

 loop com- pensation for the PW M converter (see Application Information).FBN嘉泰姆
FB (Pin5)FBN嘉泰姆
FB pin is the inverter input of the error amplifier and it receives the feedback voltage from an external FBN嘉泰姆

resis-tive divider across the output (V OUT). The output voltage is determined by:FBN嘉泰姆
EN (Pin6)FBN嘉泰姆
Pull the pin higher than 2V to enable the device, and pull the pin lower than 0.8V to shutdown the FBN嘉泰姆

device. In shutdown, the SS is discharged and the UGATE and LGATE pins are held low. The EN pin FBN嘉泰姆

is the open-collector, and it will not be floating. FBN嘉泰姆
GND (Pin7)FBN嘉泰姆
Signal ground for the IC. FBN嘉泰姆
PHASE (Pin8)FBN嘉泰姆
This pin is connected to the source of the high-side MOSFET and is used to monitor the voltage dropFBN嘉泰姆

 across the high-side MOSFET for over-current protection. FBN嘉泰姆
UGATE (Pin9)FBN嘉泰姆
Connect the pin to external MOSFET, and provides the gate drive for the upper MOSFET.FBN嘉泰姆

BOOT (Pin 10)FBN嘉泰姆
This pin provides the supply voltage to the high side MOSFET driver. For driving logic level N-channel FBN嘉泰姆

MOSEFT,a bootstrap circuit can be used to create a suitable driver’s supply. FBN嘉泰姆
PGND (Pin11)FBN嘉泰姆
Power ground for the gate diver. Connect the lower MOSFET source to this pin. FBN嘉泰姆
LGATE (Pin 12)FBN嘉泰姆

Connect the pin to the external MOSFET, and provides the gate drive signal for the lower MOSFET.FBN嘉泰姆
PVCC (Pin13)FBN嘉泰姆
This pin provides a supply voltage for the lower gate drive, connect it to the VCC pin in common use. FBN嘉泰姆
VCC (Pin14)FBN嘉泰姆
This pin provides a supply voltage for the device. When the VCC is above the rising threshold 10.4V, FBN嘉泰姆

the device is turned on; conversely, when the VCC is below the falling threshold, the device is turned off.FBN嘉泰姆
六.电路原理图FBN嘉泰姆


blob.pngFBN嘉泰姆
七,功能概述FBN嘉泰姆


Output Capacitor SelectionFBN嘉泰姆
The selection of COUT is determined by the required effec-tive series resistance (ESR) and voltage ratingFBN嘉泰姆

 rather than the actual capacitance requirement. Therefore, select highperformance low ESR capacitors FBN嘉泰姆

that are intended for switching regulator applications. In some applications,multiple capacitors have toFBN嘉泰姆

 be paralled to achieve the desired ESR value. If tantalum capacitors are used, makesure they are surgeFBN嘉泰姆

 tested by the manufactures. If in doubt,consult the capacitors manufacturer.FBN嘉泰姆
 Input Capacitor SelectionFBN嘉泰姆
The input capacitor is chosen based on the voltage rating and the RMS current rating. For reliable FBN嘉泰姆

operation, select the capacitor voltage rating to be at least 1.3 times higher than the maximum inputFBN嘉泰姆

 voltage. The maximum RMS current rating requirement is approximately IOUT/2 , where IOUT is the FBN嘉泰姆

load current. During power up, the input capaci-tors have to handle large amount of surge current.FBN嘉泰姆

 If tanta-lum capacitors are used, make sure they are surge tested by the manufactures. If in doubt, FBN嘉泰姆

consult the capacitors manufacturer.For high frequency decoupling, a ceramic capacitor be-tweenFBN嘉泰姆

 0.1μF to 1μF can be connected between the VCC and the ground pin.FBN嘉泰姆
Inductor SelectionFBN嘉泰姆
The inductance of the inductor is determined by the out-put voltage requirement. The larger the FBN嘉泰姆

inductance, the lower the inductor’s current ripple. This will translate into lower output ripple voltage.FBN嘉泰姆

 The ripple current and ripple voltage can be approximated by:FBN嘉泰姆
where Fs is the switching frequency of the regulator.There is a tradeoff exists between the inductor’sFBN嘉泰姆

 ripple current and the regulator load transient response time. A smaller inductor will give the regulator FBN嘉泰姆

a faster load tran-sient response at the expense of higher ripple current and vice versa. The maximumFBN嘉泰姆

 ripple current occurs at the maximum input voltage. A good starting point is to choose the ripple FBN嘉泰姆

current to be approximately 30% of the maxi-mum output current.Once the inductance value has FBN嘉泰姆

been chosen, select an inductor that is capable of carrying the required peak cur-rent without going FBN嘉泰姆

into saturation. In some types of inductors, especially core that is make of ferrite, the rippleFBN嘉泰姆
current will increase abruptly when it saturates. This will result in a larger output ripple voltage.FBN嘉泰姆
CompensationFBN嘉泰姆
The output LC filter introduces a double pole, which con-tributes with –40dB/decade gain slope and FBN嘉泰姆

180 degrees phase shift in the control loop. A compensation network between the COMP pin and the FBN嘉泰姆

ground should be added. The simplest loop compensation network is shown inFBN嘉泰姆
Figure 5.FBN嘉泰姆
The output LC filter consists of the output inductor and output capacitors. The transfer function ofFBN嘉泰姆

 the LC filter is given by:FBN嘉泰姆
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