产品概述 返回TOPaFE嘉泰姆

The CXCO4334 is a dual bidirectional I2 C and SMBUS voltage-level translator with an enable (EN) input, and is operational from 1.2V to 3.3V VREF1 and 2.5V to 5.5V VREF2 . It allows bidirectional voltage translations between 1.2V and 5V, without use of directional pin. The low ON-state resistance (rON) of the switch ensures the connections to be with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 I/O and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance exists between ports. In I2 C applications, the bus capacitance limit of 400pF restricts the number of devices and bus length. The system designer could isolate two halves of a bus by using the CXCO4334; thus, more I2 C devices or longer trace length can be accommodated. In standard I2 C system, pull-up resistors are required to provide the logic high levels on the translator’s bus. The size of these pull-up resistors depends on the system, but each side of the repeater must have a pull-up resistor. The CXCO4334 is designed to work with standard-mode and fast-mode I2 C devices. Standard mode I2 C devices only specify 3mA in a generic I2 C system where standard mode devices and multiple masters are possible. Under certain conditions, high termination currents can be used. When the SDA1 or SDA2 port is low, the clamp is in the ON state, and a low resistance connection exists between the SDA1 and SDA2 ports. Assuming the higher voltage is on the SDA2 port, when the SDA2 port is high, the voltage on the SDA1 port is limited to the voltage set by VREF1. When the SDA1 is high the SDA2 port is pulled up to the drain pull-up supply voltage (VDPU) by pull-up resistors. This function allows a seamless translation between higher and lower voltages selected by the user, without any directional control. The SCL1/SCL2 channel works like the SDA1/SDA2 channel. All channels have the same electrical characteristics, and there is minimal deviation from one output to another in voltage or propagation delay. This is a benefit over discrete translation solutions, since the fabrication of the switch is symmetrical.

   产品特点 返回TOPaFE嘉泰姆

„ 2-Bit Bidirectional Translator for SDA and SCL Lines in Mix-Mode I2 C Applications aFE嘉泰姆

„ I 2 C and SMBus Compatible aFE嘉泰姆

„ Less than 1.5ns Maximum Propagation Delay to Accommodate Standard-Mode and Fast-Model I2 C Devices and Multiple Masters aFE嘉泰姆

„ Allows Voltage-Level Translator Between aFE嘉泰姆

Š 1.2V VREF1 and 2.5V, 3.3V, 5V VREF2 aFE嘉泰姆

Š 1.8V VREF1 and 3.3V, 5V VREF2 aFE嘉泰姆

Š 3.3V VREF1 and 5V VREF2 aFE嘉泰姆

„ Provides Bidirectional Voltage Translation without Direction Pin aFE嘉泰姆

„ Low 3.5Ω ON-State Connection Between Input and Output Ports Provides Less Signal Distortion aFE嘉泰姆

„ Open-Drain I2 C I/O Ports aFE嘉泰姆

„ 5V Tolerant I2 C I/O Ports to Support Mixed Mode Signal Operation aFE嘉泰姆

„ High Impedance SCL1,SDA1,SCL2 and SDA2 Pins for EN=Low aFE嘉泰姆

„ Lock-up-Free Operation for Isolation When EN=LowaFE嘉泰姆

   应用范围 返回TOPaFE嘉泰姆

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