目录

1.产品概述       2.产品特点     J7u嘉泰姆

3.应用范围       4.技术规格书下载（PDF文档）J7u嘉泰姆

5.产品封装       6.电路原理图  J7u嘉泰姆

7.相关产品J7u嘉泰姆

   产品概述 返回TOPJ7u嘉泰姆

The CXSD62110 integrates a synchronous buck PWM controller to generate VDDQ, a sourcing and sinking LDO linear regulator to generate VTT. It provides a complete power supply for DDR2 and DDR3 memory system. It offers the lowest total solution cost in system where space is at a premium. The CXSD62110 provides excellent transient response and accurate DC voltage output in PFM Mode. In Pulse Frequency Mode (PFM), the CXSD62110 provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. The CXSD62110 is equipped with accurate current-limit, output under-voltage, and output over-voltage protections. A Power-On- Reset function monitors the voltage on VCC prevents wrong operation during power on. The LDO is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination. The device integrates two power transistors to source or sink current up to 1.5A. It also incorporates current-limit and thermal shutdown protection. An internal resistor divider is used to provide a half voltage of VDDQSNS for VTTREF and VTT Voltage. The VTT output voltage is only requiring 20mF of ceramic output capacitance for stability and fast transient response. The S3 and S5 pins provide the sleep state for VTT (S3 state) and suspend state (S4/S5 state) for device, when S5 and S3 are both pulled low the device provides the soft-off for VTT and VTTREF.The CXSD62110 is available in 3mmx3mm 20-pin QFN and 3mmx3mm 16-pin TQFN packages.

   产品特点 返回TOPJ7u嘉泰姆

Buck Controller (VDDQ) J7u嘉泰姆

· High Input Voltages Range from 3V to 28V Input Power J7u嘉泰姆

· Provide 1.8V (DDR2), 1.5V (DDR3) or Adjustable Output Voltage from 0.5V to 2V - ±1% Accuracy Over-Temperature J7u嘉泰姆

· Build in VREF Voltage 1.8V ±1% Accuracy over Temperature J7u嘉泰姆

· Integrated MOSFET Drivers J7u嘉泰姆

· Integrated Bootstrap Forward P-CH MOSFET J7u嘉泰姆

· Excellent Line and Load Transient Responses J7u嘉泰姆

· PFM Mode for Increased Light Load Efficiency J7u嘉泰姆

· Selectable 300kHz/400kHz/500kHz Switching Frequebcies J7u嘉泰姆

· Integrated MOSFET Drivers and Bootstrap Diode J7u嘉泰姆

· S3 and S5 Pins Control The Device in S0, S3, or S4/S5 State J7u嘉泰姆

· Power Good Monitoring J7u嘉泰姆

· 50% Under-Voltage Protection (UVP) J7u嘉泰姆

· 125% Over-Voltage Protection (OVP) J7u嘉泰姆

· Adjustable Current-Limit Protection J7u嘉泰姆

- Using Sense Low-Side MOSFET RDS(ON) J7u嘉泰姆

· QFN-20 3mmx3mm Package (QFN-20) and QFN-16 3mmx3mm Thin Package (TQFN-16) J7u嘉泰姆

· Lead Free Available (RoHS Compliant) +1.5A LDO Section (VTT) J7u嘉泰姆

· Souring or Sinking Current up to 1.5A J7u嘉泰姆

· Fast Transient Response for Output Voltage J7u嘉泰姆

· Output Ceramic Capacitors Support at Least 10mF MLCC J7u嘉泰姆

· VTT and VTTREF Track at Half the VDDQSNS by Internal Divider J7u嘉泰姆

· ±20mV Accuracy for VTT and VTTREF J7u嘉泰姆

· Independent Over-Current-Limit (OCL) J7u嘉泰姆

· Thermal Shutdown ProtectionJ7u嘉泰姆

   应用范围 返回TOPJ7u嘉泰姆

· DDR2, and DDR3 Memory Power Supplies J7u嘉泰姆

· SSTL-2 SSTL-18 and HSTL TerminationJ7u嘉泰姆

   技术规格书（产品PDF) 返回TOP J7u嘉泰姆

     需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！J7u嘉泰姆

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产品封装图 返回TOPJ7u嘉泰姆

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电路原理图 返回TOPJ7u嘉泰姆

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