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CXSD62106|A 同步buck-PWM控制器来产生VDDQ源极和陷极LDO线性调节器来产生VTT DDR2和DDR3内存提供完整的电源
发表时间:2020-04-22浏览次数:314
CXSD62106|A 同步buck-PWM控制器来产生VDDQ源极和陷极LDO线性调节器来产生VTT DDR2和DDR3内存提供完整的电源
 

目录WrN嘉泰姆

1.产品概述                       2.产品特点WrN嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 WrN嘉泰姆
5.产品封装图                     6.电路原理图                   WrN嘉泰姆
7.功能概述                        8.相关产品WrN嘉泰姆

一,产品概述(General Description)         WrN嘉泰姆
      The CXSD62106/A integrates a synchronous buck PWM controller to generateWrN嘉泰姆
VDDQ, a sourcing and sinking LDO linear regulator to generate VTT. It providesWrN嘉泰姆
a complete power supply for DDR2 and DDR3 memory system. It offers the lowestWrN嘉泰姆
total solution cost in system where space is at a premium.WrN嘉泰姆
      The CXSD62106/A provides excellent transient response  and accurate DC WrN嘉泰姆

voltage output in either PFM or PWM Mode. In Pulse Frequency Mode (PFM), the CXSD62106/A provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. On TQFN4x4- 24A package, the Forced PWM WrN嘉泰姆

Mode works nearly at con-stant frequency for low-noise requirements.WrN嘉泰姆
The CXSD62106/A is equipped with accurate current-limit,output under-voltage,WrN嘉泰姆

and output over-voltage protections.A Power-On-Reset function monitors the WrN嘉泰姆

voltage on VCC prevents wrong operation during power on.The LDO is designed WrN嘉泰姆

to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination.The device integrates two power transistors to source or sink current WrN嘉泰姆

up to 1.5A. It also incorporates current-limit and thermal shutdown protection.WrN嘉泰姆

The output voltage of LDO tracks the voltage at VTTREF pin. An internal resistorWrN嘉泰姆

divider is used to provide a half voltage of VDDQ for VTTREF and VTT Voltage. WrN嘉泰姆

The VTT output voltage is only requiring 20μF of ceramic output capacitance forWrN嘉泰姆

 stability and fast transient response. The S3 and S5 pins provide the sleep stateWrN嘉泰姆

 for VTT (S3 state)and suspend state (S4/S5 state) for device, when S5 andWrN嘉泰姆
S3 are both pulled low the device provides the soft-off for VTT and VTTREF.WrN嘉泰姆
The CXSD62106/A is available in 4mmx4mm 24-pin TQFN package, and the WrN嘉泰姆

CXSD62106A is available in 3mmx3mm 20-pin TQFN package.WrN嘉泰姆
二.产品特点(Features)WrN嘉泰姆
Buck Controller (VDDQ)WrN嘉泰姆
·  High Input Voltages Range from 3V to 28V Input PowerWrN嘉泰姆
Provide 1.8V (DDR2), 1.5V (DDR3) or AdjustableWrN嘉泰姆
Output Voltage from 0.75V to 5.5VWrN嘉泰姆
- ±1% Accuracy Over-TemperatureWrN嘉泰姆
Integrated MOSFET Drivers and Bootstrap DiodeWrN嘉泰姆
Excellent Line and Load Transient ResponsesWrN嘉泰姆
PFM Mode for Increased Light Load EfficiencyWrN嘉泰姆
Constant-On-Time Controller SchemeWrN嘉泰姆
- Switching Frequency Compensation for PWMModeWrN嘉泰姆
- Adjustable Switching Frequency from 100kHzWrN嘉泰姆
to 550kHz in PWM Mode with DC Output CurrentWrN嘉泰姆
Integrated MOSFET Drivers and Bootstrap DiodeWrN嘉泰姆
S3 and S5 Pins Control The Device in S0, S3, or S4/S5 StateWrN嘉泰姆
Power Good MonitoringWrN嘉泰姆
70% Under-Voltage Protection (UVP)WrN嘉泰姆
125% Over-Voltage Protection (OVP)WrN嘉泰姆
Adjustable Current-Limit ProtectionWrN嘉泰姆
Using Sense Low-Side MOSFET RDS(ON)WrN嘉泰姆
±1.5A LDO Section (VTT)WrN嘉泰姆
Souring or Sinking Current up to 1.5AWrN嘉泰姆
Fast Transient Response for Output VoltageWrN嘉泰姆
Output Ceramic Capacitors Support at Least 10μF MLCCWrN嘉泰姆
VTT and VTTREF Track at Half the VDDQSNS by Internal DividerWrN嘉泰姆
±20mV Accuracy for VTT and VTTREFWrN嘉泰姆

Independent Over-Current-Limit (OCL) WrN嘉泰姆

Thermal Shutdown ProtectionWrN嘉泰姆

QFN-24 4mmx4mm Thin Package (TQFN4x4-24A)WrN嘉泰姆
for CXSD62106 and QFN-20 3mmx3mm ThinWrN嘉泰姆
Package (TQFN3x3-20) for CXSD62106AWrN嘉泰姆
Lead Free and Green Devices Available
WrN嘉泰姆

三,应用范围 (Applications)WrN嘉泰姆


DDR2, and DDR3 Memory Power SuppliesWrN嘉泰姆
SSTL-2 SSTL-18 and HSTL TerminationWrN嘉泰姆
四.下载产品资料PDF文档 WrN嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持WrN嘉泰姆

 QQ截图20160419174301.jpgWrN嘉泰姆

五,产品封装图 (Package)WrN嘉泰姆


blob.pngblob.pngWrN嘉泰姆

六.电路原理图WrN嘉泰姆


blob.pngWrN嘉泰姆

七,功能概述WrN嘉泰姆


Layout Consideration (Cont.)WrN嘉泰姆

· Keep the switching nodes (UGATE, LGATE, BOOT, and PHASE) away from sensitive small signal nodesWrN嘉泰姆
(VDDQSET, VTTREF, CS, and MODE) since these nodes are fast mov ing signals. Therefore, keep tracesWrN嘉泰姆
to these nodes as short as possible and there should be no other weak signal traces in parallel with thesesWrN嘉泰姆
traces on any layer.WrN嘉泰姆
 The signals going through theses traces have both high dv/dt and high di/dt, with high peak charging andWrN嘉泰姆
discharging current. The traces from the gate drivers to the MOSFETs (UGATE and LGATE) should be shortWrN嘉泰姆
and wide.WrN嘉泰姆
Place the source of the high-side MOSFET and the drain of the low-side MOSFET as close as possible. Mini-WrN嘉泰姆
mizing the impedance with wide layout plane between the two pads reduces the voltage bounce of the node.
ceramic capacitor near the drain of the high-side MOSFET as close as possible. The bulk capacitors areWrN嘉泰姆
also placednear the drain).WrN嘉泰姆
The input capacitor should be near the drain of the up per MOSFET; the high quality ceramic decoupling ca-WrN嘉泰姆
pacitor can be put close to the VCC and GND pins; the VTTREF decoupling capasitor should be close to theWrN嘉泰姆
VTTREF pin and GND; the VDDQ and VTT output ca-pacitors should be located right across their output pinWrN嘉泰姆
as clase as possible to the part to minimize parasitics.WrN嘉泰姆
The input capacitor GND should be close to the output capacitor GND and the lower MOSFET GND.WrN嘉泰姆
· The drain of the MOSFETs (VIN and PHASE nodes) should be a large plane for heat sinking. And PHASEWrN嘉泰姆
pin traces are also the return path for UGATE. Connect this pin to the converter’s upper MOSFET source.WrN嘉泰姆
· The CXSD62106/A used ripple mode control. Build the resistor divider close to the VDDQSET pin so that theWrN嘉泰姆
high imped ance trace is shorter when the output volt-age is in ad justable mode. And the VDDQSET pinWrN嘉泰姆
traces can’t be closed to the switching signal traces (UGATE, LGATE, BOOT, and PHASE)WrN嘉泰姆
 The PGND trace should be a separate trace, and inde pendently go to the source of the low-side MOSFETsWrN嘉泰姆
for current limit accuracy.Decoupling capacitor, the resistor dividers, boot capacitors, and current limit stetting resistor should be close their pins. (For example, place the decouplingWrN嘉泰姆

八,相关产品              更多同类产品...... WrN嘉泰姆


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